[PATCH] D76460: [mlir] [VectorOps] Introduce vector.transpose

[River Riddle via Phabricator via llvm-commits]

rriddle added inline comments.


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Comment at: mlir/include/mlir/Dialect/Vector/VectorOps.td:1284
+
+    %1 = vector.tranpose %0, [i_1, .., i_n]
+      : vector<d_1 x .. x d_n x f32>
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Please make sure that you use mlir code blocks for descriptions.


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Comment at: mlir/lib/Dialect/Vector/VectorOps.cpp:1538
+    return op.emitOpError("transposition length mismatch: ") << size;
+  SmallVector<bool, 8> seen(rank, false);
+  for (auto ta : llvm::enumerate(transpAttr)) {
----------------
nit: Prefer using llvm::SmallBitVector or llvm::BitVector.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76460/new/

https://reviews.llvm.org/D76460