[llvm] c69a4d6 - [SelectionDAG] When splitting gathers/scatters in type legalization, set MMO size to UnknownSize

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 18 16:16:20 PDT 2020


Just curious, we have the ability to describe multiple memory locations 
for a single instruction.  Why not simply track each lane independently 
and keep the right locations on each half?

Philip

On 3/18/20 4:12 PM, Craig Topper via llvm-commits wrote:
> Author: Craig Topper
> Date: 2020-03-18T16:07:15-07:00
> New Revision: c69a4d6bef0a1350f509f35beb450dccc2a6c5e2
>
> URL: https://github.com/llvm/llvm-project/commit/c69a4d6bef0a1350f509f35beb450dccc2a6c5e2
> DIFF: https://github.com/llvm/llvm-project/commit/c69a4d6bef0a1350f509f35beb450dccc2a6c5e2.diff
>
> LOG: [SelectionDAG] When splitting gathers/scatters in type legalization, set MMO size to UnknownSize
>
> Gather/scatter don't access one memory location, they access multiple disjoint locations. So using a fixed size isn't accurate. But we don't have a way to represent the true behavior so just use UnknownSize.
>
> Previously we "split" the memory VT and use that size for the MMO of each half. But the memory VT is scalar so splitting usually just returned the original scalar VT, but on 32-bit X86 if the scalar VT was i64 it probably returned i32?
>
> Differential Revision: https://reviews.llvm.org/D76388
>
> Added:
>      
>
> Modified:
>      llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
>
> Removed:
>      
>
>
> ################################################################################
> diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> index 5a4b4c615bc0..09934bbb29fe 100644
> --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> @@ -20,10 +20,11 @@
>   //===----------------------------------------------------------------------===//
>   
>   #include "LegalizeTypes.h"
> +#include "llvm/Analysis/MemoryLocation.h"
>   #include "llvm/IR/DataLayout.h"
>   #include "llvm/Support/ErrorHandling.h"
> -#include "llvm/Support/raw_ostream.h"
>   #include "llvm/Support/TypeSize.h"
> +#include "llvm/Support/raw_ostream.h"
>   using namespace llvm;
>   
>   #define DEBUG_TYPE "legalize-types"
> @@ -1627,11 +1628,6 @@ void DAGTypeLegalizer::SplitVecRes_MGATHER(MaskedGatherSDNode *MGT,
>         std::tie(MaskLo, MaskHi) = DAG.SplitVector(Mask, dl);
>     }
>   
> -  EVT MemoryVT = MGT->getMemoryVT();
> -  EVT LoMemVT, HiMemVT;
> -  // Split MemoryVT
> -  std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT);
> -
>     SDValue PassThruLo, PassThruHi;
>     if (getTypeAction(PassThru.getValueType()) == TargetLowering::TypeSplitVector)
>       GetSplitVector(PassThru, PassThruLo, PassThruHi);
> @@ -1644,10 +1640,10 @@ void DAGTypeLegalizer::SplitVecRes_MGATHER(MaskedGatherSDNode *MGT,
>     else
>       std::tie(IndexLo, IndexHi) = DAG.SplitVector(Index, dl);
>   
> -  MachineMemOperand *MMO = DAG.getMachineFunction().
> -    getMachineMemOperand(MGT->getPointerInfo(),
> -                         MachineMemOperand::MOLoad,  LoMemVT.getStoreSize(),
> -                         Alignment, MGT->getAAInfo(), MGT->getRanges());
> +  MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
> +      MGT->getPointerInfo(), MachineMemOperand::MOLoad,
> +      MemoryLocation::UnknownSize, Alignment, MGT->getAAInfo(),
> +      MGT->getRanges());
>   
>     SDValue OpsLo[] = {Ch, PassThruLo, MaskLo, Ptr, IndexLo, Scale};
>     Lo = DAG.getMaskedGather(DAG.getVTList(LoVT, MVT::Other), LoVT, dl, OpsLo,
> @@ -2376,13 +2372,10 @@ SDValue DAGTypeLegalizer::SplitVecOp_MSCATTER(MaskedScatterSDNode *N,
>     SDValue Index = N->getIndex();
>     SDValue Scale = N->getScale();
>     SDValue Data = N->getValue();
> -  EVT MemoryVT = N->getMemoryVT();
>     unsigned Alignment = N->getOriginalAlignment();
>     SDLoc DL(N);
>   
>     // Split all operands
> -  EVT LoMemVT, HiMemVT;
> -  std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT);
>   
>     SDValue DataLo, DataHi;
>     if (getTypeAction(Data.getValueType()) == TargetLowering::TypeSplitVector)
> @@ -2409,20 +2402,14 @@ SDValue DAGTypeLegalizer::SplitVecOp_MSCATTER(MaskedScatterSDNode *N,
>       std::tie(IndexLo, IndexHi) = DAG.SplitVector(Index, DL);
>   
>     SDValue Lo;
> -  MachineMemOperand *MMO = DAG.getMachineFunction().
> -    getMachineMemOperand(N->getPointerInfo(),
> -                         MachineMemOperand::MOStore, LoMemVT.getStoreSize(),
> -                         Alignment, N->getAAInfo(), N->getRanges());
> +  MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
> +      N->getPointerInfo(), MachineMemOperand::MOStore,
> +      MemoryLocation::UnknownSize, Alignment, N->getAAInfo(), N->getRanges());
>   
>     SDValue OpsLo[] = {Ch, DataLo, MaskLo, Ptr, IndexLo, Scale};
>     Lo = DAG.getMaskedScatter(DAG.getVTList(MVT::Other), DataLo.getValueType(),
>                               DL, OpsLo, MMO, N->getIndexType());
>   
> -  MMO = DAG.getMachineFunction().
> -    getMachineMemOperand(N->getPointerInfo(),
> -                         MachineMemOperand::MOStore,  HiMemVT.getStoreSize(),
> -                         Alignment, N->getAAInfo(), N->getRanges());
> -
>     // The order of the Scatter operation after split is well defined. The "Hi"
>     // part comes after the "Lo". So these two operations should be chained one
>     // after another.
>
>
>          
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