[PATCH] D76387: [AMDGPU] Resue register during frame index elimination

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1167
           if (auto MIB = TII->getAddNoCarry(*MBB, MI, DL, ResultReg, *RS)) {
-            Register ScaledReg =
-              RS->scavengeRegister(&AMDGPU::VGPR_32RegClass, MIB, 0);
+            // Resue ResultReg in intermediate step.
+            Register ScaledReg = ResultReg;
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arsenm wrote:
> Typo Resue
Same typo exists in the review title too


Repository:
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  https://reviews.llvm.org/D76387/new/

https://reviews.llvm.org/D76387