[llvm] 9c6458e - [InstSimplify] Add bitreverse/bswap vector tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 18 11:19:22 PDT 2020
Author: Simon Pilgrim
Date: 2020-03-18T18:17:10Z
New Revision: 9c6458ecf8cdb3979c329f198312574daa92d85e
URL: https://github.com/llvm/llvm-project/commit/9c6458ecf8cdb3979c329f198312574daa92d85e
DIFF: https://github.com/llvm/llvm-project/commit/9c6458ecf8cdb3979c329f198312574daa92d85e.diff
LOG: [InstSimplify] Add bitreverse/bswap vector tests
Shows missing DemandedElts support (PR36319)
Added:
Modified:
llvm/test/Transforms/InstSimplify/bitreverse.ll
llvm/test/Transforms/InstSimplify/bswap.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstSimplify/bitreverse.ll b/llvm/test/Transforms/InstSimplify/bitreverse.ll
index d87b68831fe5..fc7a9df00e2a 100644
--- a/llvm/test/Transforms/InstSimplify/bitreverse.ll
+++ b/llvm/test/Transforms/InstSimplify/bitreverse.ll
@@ -1,31 +1,83 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -S -instsimplify | FileCheck %s
declare i32 @llvm.bitreverse.i32(i32)
+declare <2 x i32> @llvm.bitreverse.v2i32(<2 x i32>)
-; CHECK-LABEL: @test1(
-; CHECK: ret i1 false
define i1 @test1(i32 %arg) {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT: ret i1 false
+;
%a = or i32 %arg, 1
%b = call i32 @llvm.bitreverse.i32(i32 %a)
%res = icmp eq i32 %b, 0
ret i1 %res
}
-; CHECK-LABEL: @test2(
-; CHECK: ret i1 false
+define i1 @test1v(<2 x i32> %arg) {
+; CHECK-LABEL: @test1v(
+; CHECK-NEXT: [[A:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 1, i32 0>
+; CHECK-NEXT: [[B:%.*]] = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> [[A]])
+; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i32> [[B]], i32 0
+; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[C]], 0
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %a = or <2 x i32> %arg, <i32 1, i32 0>
+ %b = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %a)
+ %c = extractelement <2 x i32> %b, i32 0
+ %res = icmp eq i32 %c, 0
+ ret i1 %res
+}
+
define i1 @test2(i32 %arg) {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT: ret i1 false
+;
%a = or i32 %arg, 1024
%b = call i32 @llvm.bitreverse.i32(i32 %a)
%res = icmp eq i32 %b, 0
ret i1 %res
}
-; CHECK-LABEL: @test3(
-; CHECK: ret i1 false
+define i1 @test2v(<2 x i32> %arg) {
+; CHECK-LABEL: @test2v(
+; CHECK-NEXT: [[A:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 0, i32 1024>
+; CHECK-NEXT: [[B:%.*]] = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> [[A]])
+; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i32> [[B]], i32 1
+; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[C]], 0
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %a = or <2 x i32> %arg, <i32 0, i32 1024>
+ %b = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %a)
+ %c = extractelement <2 x i32> %b, i32 1
+ %res = icmp eq i32 %c, 0
+ ret i1 %res
+}
+
define i1 @test3(i32 %arg) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT: ret i1 false
+;
%a = and i32 %arg, 1
%b = call i32 @llvm.bitreverse.i32(i32 %a)
%and = and i32 %b, 1
%res = icmp eq i32 %and, 1
ret i1 %res
}
+
+define i1 @test3v(<2 x i32> %arg) {
+; CHECK-LABEL: @test3v(
+; CHECK-NEXT: [[A:%.*]] = and <2 x i32> [[ARG:%.*]], <i32 1, i32 -1>
+; CHECK-NEXT: [[B:%.*]] = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> [[A]])
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[B]], <i32 1, i32 -1>
+; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i32> [[AND]], i32 0
+; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[EXT]], 1
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %a = and <2 x i32> %arg, <i32 1, i32 -1>
+ %b = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %a)
+ %and = and <2 x i32> %b, <i32 1, i32 -1>
+ %ext = extractelement <2 x i32> %and, i32 0
+ %res = icmp eq i32 %ext, 1
+ ret i1 %res
+}
diff --git a/llvm/test/Transforms/InstSimplify/bswap.ll b/llvm/test/Transforms/InstSimplify/bswap.ll
index 5c67aa0a7643..904b47fd1c46 100644
--- a/llvm/test/Transforms/InstSimplify/bswap.ll
+++ b/llvm/test/Transforms/InstSimplify/bswap.ll
@@ -1,11 +1,12 @@
-; NOTE: Assertions have been autogenerated by update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -S -instsimplify | FileCheck %s
declare i16 @llvm.bswap.i16(i16)
+declare <2 x i16> @llvm.bswap.v2i16(<2 x i16>)
define i1 @test1(i16 %arg) {
; CHECK-LABEL: @test1(
-; CHECK: ret i1 false
+; CHECK-NEXT: ret i1 false
;
%a = or i16 %arg, 1
%b = call i16 @llvm.bswap.i16(i16 %a)
@@ -13,9 +14,24 @@ define i1 @test1(i16 %arg) {
ret i1 %res
}
+define i1 @test1v(<2 x i16> %arg) {
+; CHECK-LABEL: @test1v(
+; CHECK-NEXT: [[A:%.*]] = or <2 x i16> [[ARG:%.*]], <i16 1, i16 0>
+; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> [[A]])
+; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i16> [[B]], i32 0
+; CHECK-NEXT: [[RES:%.*]] = icmp eq i16 [[C]], 0
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %a = or <2 x i16> %arg, <i16 1, i16 0>
+ %b = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> %a)
+ %c = extractelement <2 x i16> %b, i32 0
+ %res = icmp eq i16 %c, 0
+ ret i1 %res
+}
+
define i1 @test2(i16 %arg) {
; CHECK-LABEL: @test2(
-; CHECK: ret i1 false
+; CHECK-NEXT: ret i1 false
;
%a = or i16 %arg, 1024
%b = call i16 @llvm.bswap.i16(i16 %a)
@@ -23,9 +39,24 @@ define i1 @test2(i16 %arg) {
ret i1 %res
}
+define i1 @test2v(<2 x i16> %arg) {
+; CHECK-LABEL: @test2v(
+; CHECK-NEXT: [[A:%.*]] = or <2 x i16> [[ARG:%.*]], <i16 0, i16 1024>
+; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> [[A]])
+; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i16> [[B]], i32 1
+; CHECK-NEXT: [[RES:%.*]] = icmp eq i16 [[C]], 0
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %a = or <2 x i16> %arg, <i16 0, i16 1024>
+ %b = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> %a)
+ %c = extractelement <2 x i16> %b, i32 1
+ %res = icmp eq i16 %c, 0
+ ret i1 %res
+}
+
define i1 @test3(i16 %arg) {
; CHECK-LABEL: @test3(
-; CHECK: ret i1 false
+; CHECK-NEXT: ret i1 false
;
%a = and i16 %arg, 1
%b = call i16 @llvm.bswap.i16(i16 %a)
@@ -34,9 +65,26 @@ define i1 @test3(i16 %arg) {
ret i1 %res
}
+define i1 @test3v(<2 x i16> %arg) {
+; CHECK-LABEL: @test3v(
+; CHECK-NEXT: [[A:%.*]] = and <2 x i16> [[ARG:%.*]], <i16 1, i16 -1>
+; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> [[A]])
+; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i16> [[B]], i32 0
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[C]], 1
+; CHECK-NEXT: [[RES:%.*]] = icmp eq i16 [[AND]], 1
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %a = and <2 x i16> %arg, <i16 1, i16 -1>
+ %b = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> %a)
+ %c = extractelement <2 x i16> %b, i32 0
+ %and = and i16 %c, 1
+ %res = icmp eq i16 %and, 1
+ ret i1 %res
+}
+
define i1 @test4(i16 %arg) {
; CHECK-LABEL: @test4(
-; CHECK: ret i1 false
+; CHECK-NEXT: ret i1 false
;
%a = and i16 %arg, 511
%b = call i16 @llvm.bswap.i16(i16 %a)
@@ -44,3 +92,20 @@ define i1 @test4(i16 %arg) {
%res = icmp eq i16 %and, 1
ret i1 %res
}
+
+define i1 @test4v(<2 x i16> %arg) {
+; CHECK-LABEL: @test4v(
+; CHECK-NEXT: [[A:%.*]] = and <2 x i16> [[ARG:%.*]], <i16 511, i16 511>
+; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> [[A]])
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i16> [[B]], <i16 255, i16 256>
+; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i16> [[AND]], i32 1
+; CHECK-NEXT: [[RES:%.*]] = icmp eq i16 [[EXT]], 1
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %a = and <2 x i16> %arg, <i16 511, i16 511>
+ %b = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> %a)
+ %and = and <2 x i16> %b, <i16 255, i16 256>
+ %ext = extractelement <2 x i16> %and, i32 1
+ %res = icmp eq i16 %ext, 1
+ ret i1 %res
+}
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