[llvm] 96b7080 - [NFC][PowerPC] Add a new MIR file to test if-converter pass
Kang Zhang via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 18 06:40:19 PDT 2020
Author: Kang Zhang
Date: 2020-03-18T13:39:49Z
New Revision: 96b70809d9599facdb5c40396330f11211874b45
URL: https://github.com/llvm/llvm-project/commit/96b70809d9599facdb5c40396330f11211874b45
DIFF: https://github.com/llvm/llvm-project/commit/96b70809d9599facdb5c40396330f11211874b45.diff
LOG: [NFC][PowerPC] Add a new MIR file to test if-converter pass
Added:
llvm/test/CodeGen/PowerPC/ifcvt.mir
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/PowerPC/ifcvt.mir b/llvm/test/CodeGen/PowerPC/ifcvt.mir
new file mode 100644
index 000000000000..b54c972baa17
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/ifcvt.mir
@@ -0,0 +1,53 @@
+# RUN: llc -mtriple=ppc32-- -run-pass=if-converter -o - -verify-machineinstrs \
+# RUN: %s | FileCheck %s
+
+---
+name: testBDZLR
+body: |
+ bb.0.entry:
+ successors: %bb.5(0x40000000), %bb.1(0x40000000)
+ liveins: $r3
+
+ renamable $r4 = LI 0
+ renamable $cr0 = CMPLWI killed renamable $r4, 0
+ BCC 68, renamable $cr0, %bb.5
+
+ bb.1:
+ successors: %bb.2(0x40000000), %bb.5(0x40000000)
+ liveins: $cr0, $r3
+
+ BCC 68, killed renamable $cr0, %bb.5
+
+ bb.2:
+ successors: %bb.3(0x80000000)
+ liveins: $r3
+
+ MTCTRloop killed renamable $r3, implicit-def dead $ctr
+ renamable $r3 = LI 0
+ renamable $r5 = IMPLICIT_DEF
+ renamable $r4 = LI 0
+
+ bb.3:
+ successors: %bb.4(0x7c000000), %bb.5(0x04000000)
+ liveins: $r3, $r4, $r5
+
+ renamable $r6 = RLWINM renamable $r4, 3, 0, 28
+ renamable $r4 = ADDIC killed renamable $r4, 1, implicit-def $carry
+ renamable $r5 = ADD4 killed renamable $r5, killed renamable $r6
+ renamable $r6 = ADD4 killed renamable $r6, renamable $r6
+ renamable $r3 = ADDZE killed renamable $r3, implicit-def dead $carry, implicit $carry
+ BDZ %bb.5, implicit-def $ctr, implicit $ctr
+
+ bb.4:
+ successors: %bb.3(0x80000000)
+ liveins: $r3, $r4
+
+ B %bb.3
+
+ bb.5:
+ BLR implicit $lr, implicit $rm
+
+
+ ; CHECK-LABEL: name: testBDZLR
+ ; CHECK: BDZLR implicit $lr, implicit $rm
+...
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