[PATCH] D76357: [AMDGPU] Implement wave32 DWARF register mapping

[Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits]

RamNalamothu created this revision.
RamNalamothu added reviewers: scott.linder, arsenm, t-tye.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, tpr, dstuttard, aprantl, yaxunl, mgorny, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

Implement the DWARF register mapping described in
llvm/docs/AMDGPUUsage.rst

This enables generating appropriate DWARF register numbers for
wave64 and wave32 modes.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D76357

Files:
  llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.td
  llvm/unittests/MC/AMDGPU/CMakeLists.txt
  llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
  llvm/unittests/MC/CMakeLists.txt
  llvm/unittests/Target/AMDGPU/CMakeLists.txt
  llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp

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