[PATCH] D76347: [mlir] NFC: Fix trivial typos in documentsFix trivial typos

[Kazuaki Ishizaki via Phabricator via llvm-commits]

kiszk created this revision.
Herald added subscribers: llvm-commits, bader, Joonsoo, liufengdb, aartbik, lucyrfox, mgester, arpith-jacob, nicolasvasilache, antiagainst, shauheen, burmako, jpienaar, rriddle, mehdi_amini.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D76347

Files:
  mlir/docs/CreatingADialect.md
  mlir/docs/Dialects/SPIR-V.md
  mlir/docs/LangRef.md
  mlir/docs/OpDefinitions.md
  mlir/docs/RationaleLinalgDialect.md
  mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td


Index: mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td
===================================================================
--- mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td
+++ mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td
@@ -7,7 +7,7 @@
 //===----------------------------------------------------------------------===//
 //
 // This file contains cast ops for the SPIR-V dialect. It corresponds
-// to "3.32.11. Convertion Instructions" of the SPIR-V specification.
+// to "3.32.11. Conversion Instructions" of the SPIR-V specification.
 //
 //===----------------------------------------------------------------------===//
 
Index: mlir/docs/RationaleLinalgDialect.md
===================================================================
--- mlir/docs/RationaleLinalgDialect.md
+++ mlir/docs/RationaleLinalgDialect.md
@@ -288,7 +288,7 @@
 Tensor Comprehensions showed that, fixing a few predefined strategies
 with parametric transformations and tuning knobs, can already provide
 great results. In that previous work, simple
-genetic search combined with an autotining framework was sufficient
+genetic search combined with an autotuning framework was sufficient
 to find good implementations in the ***non-compute bound regime***.
 This requires code versions obtainable by the
 various transformations to encompass versions that get close to the
@@ -309,7 +309,7 @@
 - Tensor Comprehensions emitted CUDA code which was then JIT compiled
 with NVCC from a textual representation. While this was a pragmatic
 short-term solution it made it hard to perform low-level rewrites that
-would have helped with register reuse in the ***comput-bound regime***.
+would have helped with register reuse in the ***compute-bound regime***.
 - The same reliance on emitting CUDA code made it difficult to
 create cost models when time came. This made it artifically harder to
 prune out bad solutions than necessary. This resulted in excessive
Index: mlir/docs/OpDefinitions.md
===================================================================
--- mlir/docs/OpDefinitions.md
+++ mlir/docs/OpDefinitions.md
@@ -654,7 +654,7 @@
 #### Optional Groups
 
 In certain situations operations may have "optional" information, e.g.
-attributes or an empty set of variadic operands. In these situtations a section
+attributes or an empty set of variadic operands. In these situations a section
 of the assembly format can be marked as `optional` based on the presence of this
 information. An optional group is defined by wrapping a set of elements within
 `()` followed by a `?` and has the following requirements:
Index: mlir/docs/LangRef.md
===================================================================
--- mlir/docs/LangRef.md
+++ mlir/docs/LangRef.md
@@ -902,7 +902,7 @@
 %T = alloc(%M, %N) [%B1, %B2] : memref<?x?xf32, #tiled_dynamic>
 
 // A memref that has a two-element padding at either end. The allocation size
-// will fit 16 * 68 float elements of data.
+// will fit 16 * 64 float elements of data.
 %P = alloc() : memref<16x64xf32, #padded>
 
 // Affine map with symbol 's0' used as offset for the first dimension.
Index: mlir/docs/Dialects/SPIR-V.md
===================================================================
--- mlir/docs/Dialects/SPIR-V.md
+++ mlir/docs/Dialects/SPIR-V.md
@@ -934,7 +934,7 @@
 register other legality constraints into the returned `SPIRVConversionTarget`.
 
 `spirv::lookupTargetEnvOrDefault()` is a handy utility function to query an
-`spv.target_env` attached in the input IR or use the feault to construct a
+`spv.target_env` attached in the input IR or use the default to construct a
 `SPIRVConversionTarget`.
 
 ### `SPIRVTypeConverter`
Index: mlir/docs/CreatingADialect.md
===================================================================
--- mlir/docs/CreatingADialect.md
+++ mlir/docs/CreatingADialect.md
@@ -105,7 +105,7 @@
 # Dialect Conversions
 
 Conversions from “X” to “Y” live in mlir/include/mlir/Conversion/XToY,
-mlir/lib/Convresion/XToY and mlir/test/Conversion/XToY, respectively.
+mlir/lib/Conversion/XToY and mlir/test/Conversion/XToY, respectively.
 
 Default file names for conversion should omit “Convert” from their
 name, e.g. lib/VectorToLLVM/VectorToLLVM.cpp.


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