[PATCH] D62368: Add support for Hygon Dhyana processor
Jinke Fan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 17 23:15:41 PDT 2020
fanjinke updated this revision to Diff 250996.
fanjinke added a comment.
Results of "make check":
Testing Time: 1153.40s
Expected Passes : 36042
Expected Failures : 163
Unsupported Tests : 340
[100%] Built target check-llvm
Scanning dependencies of target check
[100%] Built target check
The compiler-rt directory can be compiled using gcc.
ChangeLog:
v2:
- Updated the scudo part of the patch, Thanks Cryptoad!
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D62368/new/
https://reviews.llvm.org/D62368
Files:
clang/lib/Headers/cpuid.h
compiler-rt/lib/scudo/scudo_utils.cpp
compiler-rt/lib/scudo/standalone/checksum.cpp
Index: compiler-rt/lib/scudo/standalone/checksum.cpp
===================================================================
--- compiler-rt/lib/scudo/standalone/checksum.cpp
+++ compiler-rt/lib/scudo/standalone/checksum.cpp
@@ -31,6 +31,13 @@
#define bit_SSE4_2 bit_SSE42 // clang and gcc have different defines.
#endif
+# ifndef signature_HYGON_ebx // They are not defined in the gcc.
+/* HYGON: "HygonGenuine" */
+#define signature_HYGON_ebx 0x6f677948
+#define signature_HYGON_edx 0x6e65476e
+#define signature_HYGON_ecx 0x656e6975
+# endif
+
bool hasHardwareCRC32() {
u32 Eax, Ebx = 0, Ecx = 0, Edx = 0;
__get_cpuid(0, &Eax, &Ebx, &Ecx, &Edx);
@@ -39,7 +46,9 @@
(Ecx == signature_INTEL_ecx);
const bool IsAMD = (Ebx == signature_AMD_ebx) && (Edx == signature_AMD_edx) &&
(Ecx == signature_AMD_ecx);
- if (!IsIntel && !IsAMD)
+ const bool IsHygon = (Ebx == signature_HYGON_ebx) && (Edx == signature_HYGON_edx) &&
+ (Ecx == signature_HYGON_ecx);
+ if (!IsIntel && !IsAMD && !IsHygon)
return false;
__get_cpuid(1, &Eax, &Ebx, &Ecx, &Edx);
return !!(Ecx & bit_SSE4_2);
Index: compiler-rt/lib/scudo/scudo_utils.cpp
===================================================================
--- compiler-rt/lib/scudo/scudo_utils.cpp
+++ compiler-rt/lib/scudo/scudo_utils.cpp
@@ -62,6 +62,14 @@
# ifndef bit_SSE4_2
# define bit_SSE4_2 bit_SSE42 // clang and gcc have different defines.
# endif
+
+# ifndef signature_HYGON_ebx // They are not defined in the gcc.
+/* HYGON: "HygonGenuine" */
+#define signature_HYGON_ebx 0x6f677948
+#define signature_HYGON_edx 0x6e65476e
+#define signature_HYGON_ecx 0x656e6975
+# endif
+
bool hasHardwareCRC32() {
u32 Eax, Ebx, Ecx, Edx;
__get_cpuid(0, &Eax, &Ebx, &Ecx, &Edx);
@@ -71,7 +79,10 @@
const bool IsAMD = (Ebx == signature_AMD_ebx) &&
(Edx == signature_AMD_edx) &&
(Ecx == signature_AMD_ecx);
- if (!IsIntel && !IsAMD)
+ const bool IsHygon = (Ebx == signature_HYGON_ebx) &&
+ (Edx == signature_HYGON_edx) &&
+ (Ecx == signature_HYGON_ecx);
+ if (!IsIntel && !IsAMD && !IsHygon)
return false;
__get_cpuid(1, &Eax, &Ebx, &Ecx, &Edx);
return !!(Ecx & bit_SSE4_2);
Index: clang/lib/Headers/cpuid.h
===================================================================
--- clang/lib/Headers/cpuid.h
+++ clang/lib/Headers/cpuid.h
@@ -24,6 +24,10 @@
#define signature_CYRIX_ebx 0x69727943
#define signature_CYRIX_edx 0x736e4978
#define signature_CYRIX_ecx 0x64616574
+/* HYGON: "HygonGenuine" */
+#define signature_HYGON_ebx 0x6f677948
+#define signature_HYGON_edx 0x6e65476e
+#define signature_HYGON_ecx 0x656e6975
/* INTEL: "GenuineIntel" */
#define signature_INTEL_ebx 0x756e6547
#define signature_INTEL_edx 0x49656e69
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D62368.250996.patch
Type: text/x-patch
Size: 2872 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200318/5ebfde54/attachment.bin>
More information about the llvm-commits
mailing list