[PATCH] D76335: [mlir] Update DRR patterns to notify the rewriter why a pattern fails to match.

[River Riddle via Phabricator via llvm-commits]

rriddle created this revision.
rriddle added reviewers: jpienaar, antiagainst.
Herald added subscribers: llvm-commits, Joonsoo, liufengdb, aartbik, lucyrfox, mgester, arpith-jacob, shauheen, burmako, mehdi_amini.
Herald added a project: LLVM.

This adds support in RewriterGen for calling into the new `PatternRewriter::notifyMatchFailure` hook. This lets derived pattern rewriters display this information to users, an example from DialectConversion is shown below:

  Legalizing operation : 'std.and'(0x60e0000066a0) {
    * Fold {
    } -> FAILURE : unable to fold
  
    * Pattern : 'std.and -> (spv.BitwiseAnd)' {
      ** Failure : operand 0 of op 'std.and' failed to satisfy constraint: '8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4'
    } -> FAILURE : pattern failed to match
  
    * Pattern : 'std.and -> (spv.LogicalAnd)' {
      ** Failure : operand 0 of op 'std.and' failed to satisfy constraint: 'bool or vector of bool values of length 2/3/4'
    } -> FAILURE : pattern failed to match
  } -> FAILURE : no matched legalization pattern

Depends On D76313 <https://reviews.llvm.org/D76313>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D76335

Files:
  mlir/tools/mlir-tblgen/RewriterGen.cpp

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