[PATCH] D76253: [AMDGPU] Print DWARF register numbers in AMDGPUInstPrinter

Scott Linder via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 17 16:46:35 PDT 2020


scott.linder marked 2 inline comments as done.
scott.linder added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp:37
+  // wave32/wave64 where using the physical register name is ambiguous: if we
+  // write e.g. `.cfi_undefined s0` we lose information about the wavefront
+  // size which we need to encode the register in the final DWARF. Ideally we
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t-tye wrote:
> v0 would be a better example than s0 as the vector registers have wave32 and wave64 DWARF versions, but the scalar registers are the same for both modes.
Thank you for the catch! That was my intention, I just used the wrong prefix. Updated in the final diff.


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