[PATCH] D76235: [ARM][LowOverheadLoops] Add checks for narrowing

[Sam Parker via Phabricator via llvm-commits]

samparker created this revision.
samparker added reviewers: SjoerdMeijer, dmgreen.
Herald added subscribers: hiraditya, kristof.beyls.

Modify ValidateLiveOuts to track 'FalseZeros' more precisely, including checks on specific operations that can generate non-zeros from zero values, e.g VMVN. We can then check that any instructions that retain some information in their output register (all narrowing instructions) that they only use and def registers that always have zeros in their falsely predicated bytes, whether or not tail predication happens.
Most of the logic remains the same, just the names of the data structures and helpers have been renamed to reflect the change in logic. The key change, apart from the opcode checkers, is that the FalseZeros set now strictly contains only instructions which will always generate zeros, and not instructions that could also have their false bytes masked away later.


https://reviews.llvm.org/D76235

Files:
  llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/ctlz-non-zeros.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/safe-retaining.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-retaining-16.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-retaining-32.mir

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