[PATCH] D75645: [MLIR] Added llvm.fence
    River Riddle via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Mon Mar 16 10:20:28 PDT 2020
    
    
  
rriddle added inline comments.
================
Comment at: mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp:764
+    int fenceSyncScopeID = fence->getSyncScopeID();
+    for (unsigned i = 0; i < ssNs.size(); i++) {
+      if (fenceSyncScopeID == llvmContext.getOrInsertSyncScopeID(ssNs[i])) {
----------------
nit: Please cache the end of the range.
for (unsigned i = 0, e = ...; i != e;
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75645/new/
https://reviews.llvm.org/D75645
    
    
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