[PATCH] D76113: [ExpandMemCmp] Correctly set alignment of generated loads

[Juneyoung Lee via Phabricator via llvm-commits]

aqjune marked an inline comment as done.
aqjune added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/bcmp-inline-small.ll:19
 ; CHECKN-NEXT: ldur x
-; CHECKS:      ldr  x
-; CHECKS-NEXT: ldr  x
-; CHECKS-NEXT: ldr  w
-; CHECKS-NEXT: ldr  w
-; CHECKS-NEXT: ldrh w
-; CHECKS-NEXT: ldrh w
-; CHECKS-NEXT: ldrb w
-; CHECKS-NEXT: ldrb w
+; CHECKS-30:      ldrb
 }
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courbet wrote:
> I'm not sure what this checks exactly.
> Can you expand the checked pattern ? It would make it clearer what we're looking for.
It checks whether ldrb is repeated 30 times (for reading 15 bytes of %s1 and %s2 each).
I think expanding this would be a bit verbose; I attach the output asm file.{F11576881}


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