[PATCH] D76068: [ARM][MachineOutliner] Add NoLRSave and Register modes.

[Sam Parker via Phabricator via llvm-commits]

samparker added a comment.

Again, I was expecting more tests... I think if you're going to dedicate a couple of paragraphs describing the logic around SP, we need to test it too!



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Comment at: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp:5689
+    unsigned NumBytesNoStackCalls = 0;
+    std::vector<outliner::Candidate> CandidatesWithoutStackFixups;
+
----------------
SmallVector instead?


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Comment at: llvm/test/CodeGen/ARM/machine-outliner-nosave-and-regs.mir:3
+# RUN: %s -o - | FileCheck %s
+# RUN: llc -mtriple=thumbv7-- -run-pass=machine-outliner -verify-machineinstrs \
+# RUN: %s -o - | FileCheck %s
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I think it would be good practise to add a thumb-1 target to any of the tests added.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D76068/new/

https://reviews.llvm.org/D76068