[llvm] 1e686d2 - [X86] Add FeatureFast7ByteNOP flag
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 12 16:24:13 PDT 2020
I feel like the name Fast7ByteNOP is slightly misleading since the
default without it is 10 bytes. Maybe they should all just be name
something like MaxNopLength7, MaxNopLength11, MaxNopLength11? I do think
the Fast7ByteNOP should be applied to KNL. I'm still a little unclear why
the limit is 7 instead of 8. The 2 cited issues are more than 3
prefix/escape bytes or more than 8 bytes are limited to decoder 0. The 8
byte NOP sequence has no prefixes and a single escape byte.
~Craig
On Thu, Mar 12, 2020 at 6:09 AM Simon Pilgrim via llvm-commits <
llvm-commits at lists.llvm.org> wrote:
>
> Author: Simon Pilgrim
> Date: 2020-03-12T13:06:43Z
> New Revision: 1e686d268980c7167f12c71e8b1bb66bdc3fd51c
>
> URL:
> https://github.com/llvm/llvm-project/commit/1e686d268980c7167f12c71e8b1bb66bdc3fd51c
> DIFF:
> https://github.com/llvm/llvm-project/commit/1e686d268980c7167f12c71e8b1bb66bdc3fd51c.diff
>
> LOG: [X86] Add FeatureFast7ByteNOP flag
>
> Lets us remove another SLM proc family flag usage.
>
> This is NFC, but we should probably check whether atom/glm/knl? should be
> using this flag as well...
>
> Added:
>
>
> Modified:
> llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
> llvm/lib/Target/X86/X86.td
> llvm/lib/Target/X86/X86Subtarget.h
>
> Removed:
>
>
>
>
> ################################################################################
> diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
> b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
> index 2f84d23d6db5..0498f3f2473a 100644
> --- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
> +++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
> @@ -924,7 +924,7 @@ bool X86AsmBackend::writeNopData(raw_ostream &OS,
> uint64_t Count) const {
> // 15-bytes is the longest single NOP instruction, but 10-bytes is
> // commonly the longest that can be efficiently decoded.
> uint64_t MaxNopLength = 10;
> - if (STI.getFeatureBits()[X86::ProcIntelSLM])
> + if (STI.getFeatureBits()[X86::FeatureFast7ByteNOP])
> MaxNopLength = 7;
> else if (STI.getFeatureBits()[X86::FeatureFast15ByteNOP])
> MaxNopLength = 15;
>
> diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td
> index a2b11d55f650..931367ce4de5 100644
> --- a/llvm/lib/Target/X86/X86.td
> +++ b/llvm/lib/Target/X86/X86.td
> @@ -329,6 +329,11 @@ def FeatureFastLZCNT
> : SubtargetFeature<
> "fast-lzcnt", "HasFastLZCNT", "true",
> "LZCNT instructions are as fast as most simple integer ops">;
> +// If the target can efficiently decode NOPs upto 7-bytes in length.
> +def FeatureFast7ByteNOP
> + : SubtargetFeature<
> + "fast-7bytenop", "HasFast7ByteNOP", "true",
> + "Target can quickly decode up to 7 byte NOPs">;
> // If the target can efficiently decode NOPs upto 11-bytes in length.
> def FeatureFast11ByteNOP
> : SubtargetFeature<
> @@ -728,6 +733,7 @@ def ProcessorFeatures {
> list<SubtargetFeature> SLMSpecificFeatures = [ProcIntelSLM,
> FeatureSlowDivide64,
> FeatureSlowPMULLD,
> + FeatureFast7ByteNOP,
> FeaturePOPCNTFalseDeps];
> list<SubtargetFeature> SLMInheritableFeatures =
> !listconcat(AtomInheritableFeatures, SLMAdditionalFeatures);
>
> diff --git a/llvm/lib/Target/X86/X86Subtarget.h
> b/llvm/lib/Target/X86/X86Subtarget.h
> index f4e8d30328ca..93801455254c 100644
> --- a/llvm/lib/Target/X86/X86Subtarget.h
> +++ b/llvm/lib/Target/X86/X86Subtarget.h
> @@ -257,6 +257,10 @@ class X86Subtarget final : public X86GenSubtargetInfo
> {
> /// ymm or zmm registers.
> bool InsertVZEROUPPER = false;
>
> + /// True if there is no performance penalty for writing NOPs with up to
> + /// 7 bytes.
> + bool HasFast7ByteNOP = false;
> +
> /// True if there is no performance penalty for writing NOPs with up to
> /// 11 bytes.
> bool HasFast11ByteNOP = false;
>
>
>
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