[PATCH] D75863: [AIX] Implement by-val caller arguments in a single register

[Sean Fertile via Phabricator via llvm-commits]

sfertile added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7125
+        }
+        SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, LoadAddr,
+                                      MachinePointerInfo(), VT);
----------------
IIUC EXTLOAD is safe for the first load because it will be left justified in the register after the shift,  but the later loads need the upper bits defined to zero because we are ORing them into those shifted bits. 


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  https://reviews.llvm.org/D75863/new/

https://reviews.llvm.org/D75863