[PATCH] D69936: [IPRA][ARM] Spill extra registers at -Oz
Oliver Stannard (Linaro) via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 12 03:03:25 PDT 2020
ostannard marked an inline comment as done.
ostannard added inline comments.
================
Comment at: llvm/lib/Target/ARM/ARMFrameLowering.cpp:1633
+ for (MachineBasicBlock &MBB : MF) {
+ if (MBB.isEHFuncletEntry())
+ SaveBlocks.insert(&MBB);
----------------
efriedma wrote:
> I'm not sure why you think funclets are relevant... we don't actually support generating exception-handling code on Windows for 32-bit ARM. Even if they were relevant, I'm not sure why they would need special treatment here.
I think I must have cargo-culted this from somewhere else, I'll remove it.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D69936/new/
https://reviews.llvm.org/D69936
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