[PATCH] D75918: [MachinePipeliner] Refine the RecMII calculation

[Lama via Phabricator via llvm-commits]

lsaba added a comment.

In D75918#1917282 <https://reviews.llvm.org/D75918#1917282>, @bcahoon wrote:

> Yep, stores to physical registers will create output dependences, which can be done using inline assembly. At least, most of the code in the pipeliner that deals with output dependences is exercised using inline asm code.
>
> The only Hexagon instructions with two outputs that the compiler generates are the post-increment load instructions, and it would be difficult to create a chain of these. There are some esoteric instructions, but they are typically generated through intrinsics only.  I can try to create a test for this...


That would be very much appreciated!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75918/new/

https://reviews.llvm.org/D75918