[PATCH] D69936: [IPRA][ARM] Spill extra registers at -Oz

[Oliver Stannard (Linaro) via Phabricator via llvm-commits]

ostannard updated this revision to Diff 249633.
ostannard marked an inline comment as done.
ostannard added a comment.

- Rebase
- Use `Register` type instead of `unsigned`
- Remove change in shrink wrapping. This was an attempt to avoid an issue where shrink wrapping causes `determineCalleeSaves` to get called twice, but since shrink wrapping is bad for code size on ARM, it's simpler to disable it at -Oz.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69936/new/

https://reviews.llvm.org/D69936

Files:
  llvm/include/llvm/CodeGen/MachineRegisterInfo.h
  llvm/lib/CodeGen/MachineRegisterInfo.cpp
  llvm/lib/CodeGen/PrologEpilogInserter.cpp
  llvm/lib/Target/ARM/ARMFrameLowering.cpp
  llvm/lib/Target/ARM/ARMFrameLowering.h
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
  llvm/test/CodeGen/ARM/ipra-extra-spills.ll
  llvm/test/CodeGen/Thumb2/ifcvt-minsize.ll

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