[PATCH] D75993: [Target][ARM] Improvements to the VPT Block Insertion Pass

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh created this revision.
Pierre-vh added a reviewer: dmgreen.
Herald added subscribers: llvm-commits, hiraditya, kristof.beyls.
Herald added a project: LLVM.

This patch enhances the MVE-VPT block insertion pass by allowing it to remove VPNOT instructions to place the predicated instructions in an "else" block, resulting in more compact code.

Previously, this pass generated this kind of assembly:

  vldrw.u32	q1, [r5]
  vpt.s32	ge, q1, r2                      ; Added by MVE-VPT block insertion pass
  vcmpt.s32	le, q1, r3
  vpnot
  vpst	                                ; Added by MVE-VPT block insertion pass
  vstrwt.32	q0, [r5], #16

Now, when the VPNOT's result (stored in VPR) is not needed, and when the above block has enough room, it'll generate this instead:

  vldrw.u32	q1, [r5]
  vpte.s32	ge, q1, r2                     ; Added by MVE-VPT block insertion pass
  vcmpt.s32	le, q1, r3
  vstrwe.32	q0, [r5], #16 

This is much shorter and should be more efficient, and the pass will only remove the VPNOT when VPR is used+killed by one instruction or when VPR is written to in its block.
This should be enough to avoid losing the result of a VPNOT if it's needed, however I'm open to suggestions as I don't actually know if it's good enough.

The patch also contains some minor formatting changes, as I ran clang-format on the file to format my code, and it changed old code as well, but I believe it's for the better. I can always revert if you want.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75993

Files:
  llvm/lib/Target/ARM/MVEVPTBlockPass.cpp
  llvm/test/CodeGen/Thumb2/mve-pred-not.ll
  llvm/test/CodeGen/Thumb2/mve-pred-threshold.ll
  llvm/test/CodeGen/Thumb2/mve-vpt-3-blocks-kill-vpr.mir
  llvm/test/CodeGen/Thumb2/mve-vpt-nots.mir

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