[PATCH] D75961: [InstCombine] reduce demand-limited bool math to logic

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 11 07:24:42 PDT 2020


spatel marked 2 inline comments as done.
spatel added inline comments.


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:457
   case Instruction::Add:
+    if (DemandedMask.isSignMask()) {
+      // Try to convert bool math to logic:
----------------
nikic wrote:
> Wouldn't it be sufficient to check that the LSB is not demanded? I don't think we care that specifically the MSB is demanded, any of the top bits could be.
Yes - good point. Once the low-bit is removed, the result can only be 0 or -1.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75961/new/

https://reviews.llvm.org/D75961





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