[PATCH] D75942: [x86][seses] No lfences in bb w/ 1 load and 0 stores

George Burgess IV via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 10 18:05:28 PDT 2020


george.burgess.iv accepted this revision.
george.burgess.iv added a comment.
This revision is now accepted and ready to land.

Thanks!

Please wait for a stamp from another reviewer here, too.



================
Comment at: llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp:59
+static cl::opt<bool>
+    OmitLFENCEInBasicBlocksWithOneLoadAndNoStores("x86-seses-omit-lfence-in-bb-with-one-load-no-stores",
+                      cl::desc("Don't LFENCE in basic blocks with one load and no stores."),
----------------
nit: 80cols please


================
Comment at: llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp:97
+   if (OmitLFENCEInBasicBlocksWithoutLoads || OmitLFENCEInBasicBlocksWithOneLoadAndNoStores) {
 
+      int LoadCount = 0;
----------------
nit: please remove this blank line


================
Comment at: llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp:101
+
+      for (const MachineInstr& MI: MBB) {
         if (MI.mayLoad()) {
----------------
clang-format this patch please (the & should be near the MI)


================
Comment at: llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression-omit-lfence-in-bb-with-one-load-no-stores.ll:25
+; CHECK-FLAGGED: .globl _Z3fooPi                # -- Begin function _Z3fooPi
+; CHECK-FLAGGED: .p2align 4, 0x90
+; CHECK-FLAGGED: .type _Z3fooPi, at function
----------------
same "please consider using -NEXT if you want to match adjacent lines" comment as D75941


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75942/new/

https://reviews.llvm.org/D75942





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