[PATCH] D75947: [AArch64][SVE] Implement structured store intrinsics

Cullen Rhodes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 10 10:53:12 PDT 2020


c-rhodes created this revision.
c-rhodes added reviewers: sdesmalen, efriedma, renatoriolino.
Herald added subscribers: danielkiss, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett.
Herald added a reviewer: rengolin.
Herald added a project: LLVM.

This patch adds initial support for the following intrinsics:

- llvm.aarch64.sve.st2
- llvm.aarch64.sve.st3
- llvm.aarch64.sve.st4

For storing two, three and four vectors worth of data. Basic codegen for
reg+immediate forms are implemented. Reg+reg addressing modes will be
addressed in a later patch.

These intrinsics are intended for use in the Arm C Language Extension
(ACLE).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75947

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll

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