[PATCH] D75915: [GlobalISel] combine G_TRUNC with G_MERGE_VALUES
Dominik Montada via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 10 08:40:04 PDT 2020
gargaroff updated this revision to Diff 249395.
gargaroff added a comment.
Initialize SrcRegs to exact size
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D75915/new/
https://reviews.llvm.org/D75915
Files:
llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir
llvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir
llvm/test/CodeGen/Mips/GlobalISel/legalizer/zextLoad_and_sextLoad.mir
llvm/test/CodeGen/Mips/GlobalISel/legalizer/zext_and_sext.mir
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zextLoad_and_sextLoad.ll
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zext_and_sext.ll
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