[PATCH] D75915: [GlobalISel] combine G_TRUNC with G_MERGE_VALUES

Dominik Montada via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 10 06:24:09 PDT 2020


gargaroff created this revision.
gargaroff added reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic.
Herald added subscribers: llvm-commits, kerbowa, atanasyan, jrtc27, rovka, nhaehnle, wdng, jvesely, sdardis.
Herald added a project: LLVM.

Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases:

1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly
2. If the sizes are the same, we can replace the register or use a copy
3. If the truncation size is a multiple of the merge source size, we can build a smaller merge

This gets rid of most of the larger, hard-to-legalize merges.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75915

Files:
  llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/zextLoad_and_sextLoad.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/zext_and_sext.mir
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zextLoad_and_sextLoad.ll
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zext_and_sext.ll

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