[PATCH] D75909: [AMDGPU] Remove the gfx10 VALU register destination cache model

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
foad added reviewers: rampitec, arsenm, nhaehnle.
Herald added subscribers: llvm-commits, kerbowa, javed.absar, hiraditya, t-tye, tpr, dstuttard, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
foad added a child revision: D75910: [AMDGPU] Improve scheduling model for VOP3b instructions.

It complicates the model and we don't yet have any evidence that it
improves benchmarks.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75909

Files:
  llvm/lib/Target/AMDGPU/SISchedule.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
  llvm/test/CodeGen/AMDGPU/fdiv.ll
  llvm/test/CodeGen/AMDGPU/idot2.ll
  llvm/test/CodeGen/AMDGPU/idot4s.ll
  llvm/test/CodeGen/AMDGPU/idot4u.ll
  llvm/test/CodeGen/AMDGPU/idot8s.ll
  llvm/test/CodeGen/AMDGPU/idot8u.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
  llvm/test/CodeGen/AMDGPU/madak.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-cmpxchg.ll
  llvm/test/CodeGen/AMDGPU/min.ll
  llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
  llvm/test/CodeGen/AMDGPU/scheduler-handle-move-bundle.mir
  llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll

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