[PATCH] D75906: [InstCombine] Support vectors in SimplifyAddWithRemainder.

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
fhahn added reviewers: spatel, lebedev.ri.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

SimplifyAddWithRemainder currently also matches for vector types, but
tries to create an integer constant, which causes a crash.

By using Constant::getIntegerValue() we can support both the scalar and
vector cases.

The 2 added test cases crash without the fix.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75906

Files:
  llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
  llvm/test/Transforms/InstCombine/add4.ll


Index: llvm/test/Transforms/InstCombine/add4.ll
===================================================================
--- llvm/test/Transforms/InstCombine/add4.ll
+++ llvm/test/Transforms/InstCombine/add4.ll
@@ -18,6 +18,20 @@
   ret i64 %tmp4
 }
 
+define <2 x i64> @match_unsigned_vector(<2 x i64> %x) {
+; CHECK-LABEL: @match_unsigned_vector(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[UREM:%.*]] = urem <2 x i64> [[X:%.*]], <i64 19136, i64 19136>
+; CHECK-NEXT:    ret <2 x i64> [[UREM]]
+;
+bb:
+  %tmp = urem <2 x i64> %x, <i64 299, i64 299>
+  %tmp1 = udiv <2 x i64> %x, <i64 299, i64 299>
+  %tmp2 = urem <2 x i64> %tmp1, <i64 64, i64 64>
+  %tmp3 = mul <2 x i64> %tmp2, <i64 299, i64 299>
+  %tmp4 = add <2 x i64> %tmp, %tmp3
+  ret <2 x i64> %tmp4
+}
 define i64 @match_andAsRem_lshrAsDiv_shlAsMul(i64 %x) {
 ; CHECK-LABEL: @match_andAsRem_lshrAsDiv_shlAsMul(
 ; CHECK-NEXT:  bb:
@@ -52,6 +66,25 @@
   ret i64 %tmp8
 }
 
+define <2 x i64> @match_signed_vector(<2 x i64> %x) {
+; CHECK-LABEL: @match_signed_vector(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[SREM1:%.*]] = srem <2 x i64> [[X:%.*]], <i64 172224, i64 172224>
+; CHECK-NEXT:    ret <2 x i64> [[SREM1]]
+;
+bb:
+  %tmp = srem <2 x i64> %x, <i64 299, i64 299>
+  %tmp1 = sdiv <2 x i64> %x, <i64 299, i64 299>
+  %tmp2 = srem <2 x i64> %tmp1, <i64 64, i64 64>
+  %tmp3 = sdiv <2 x i64> %x, <i64 19136, i64 19136>
+  %tmp4 = srem <2 x i64> %tmp3, <i64 9, i64 9>
+  %tmp5 = mul <2 x i64> %tmp2, <i64 299, i64 299>
+  %tmp6 = add <2 x i64> %tmp, %tmp5
+  %tmp7 = mul <2 x i64> %tmp4, <i64 19136, i64 19136>
+  %tmp8 = add <2 x i64> %tmp6, %tmp7
+  ret <2 x i64> %tmp8
+}
+
 define i64 @not_match_inconsistent_signs(i64 %x) {
 ; CHECK-LABEL: @not_match_inconsistent_signs(
 ; CHECK-NEXT:  bb:
Index: llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1045,7 +1045,7 @@
       if (MatchDiv(RemOpV, DivOpV, DivOpC, IsSigned) && X == DivOpV &&
           C0 == DivOpC && !MulWillOverflow(C0, C1, IsSigned)) {
         Value *NewDivisor =
-            ConstantInt::get(X->getType()->getContext(), C0 * C1);
+           Constant::getIntegerValue(X->getType(), C0 * C1);
         return IsSigned ? Builder.CreateSRem(X, NewDivisor, "srem")
                         : Builder.CreateURem(X, NewDivisor, "urem");
       }


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D75906.249311.patch
Type: text/x-patch
Size: 2461 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200310/3fc76e57/attachment.bin>