[PATCH] D75452: [ARM][MVE] Validate tail predication values
Sjoerd Meijer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 9 15:40:19 PDT 2020
SjoerdMeijer added a comment.
was just wondering about more corner cases for "negative" tests: do we have test where lanes are swapped (if that makes sense)?
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Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:582
+ // Only evaluate instructions which produce a single value.
+ if (MI.getNumDefs() != 1 || !MI.defs().begin()->isReg()) {
+ UnknownFalseLanes.insert(&MI);
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Is there a test for this?
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Comment at: llvm/test/CodeGen/Thumb2/LowOverheadLoops/unpredicated-min.mir:1
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve %s -run-pass=arm-low-overhead-loops -o - | FileCheck %s
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nit: rename file unpredicated-min.mir -> unpredicated-max.mir?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D75452/new/
https://reviews.llvm.org/D75452
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