[llvm] 6518b72 - [ExpandMemCmp] Properly constant-fold all compares.
Clement Courbet via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 9 02:41:20 PDT 2020
Author: Clement Courbet
Date: 2020-03-09T10:40:52+01:00
New Revision: 6518b72f93f5c2d46f1f0866ff44f65b6ad64af2
URL: https://github.com/llvm/llvm-project/commit/6518b72f93f5c2d46f1f0866ff44f65b6ad64af2
DIFF: https://github.com/llvm/llvm-project/commit/6518b72f93f5c2d46f1f0866ff44f65b6ad64af2.diff
LOG: [ExpandMemCmp] Properly constant-fold all compares.
Summary:
This gets rid of duplicated code and diverging behaviour w.r.t.
constants.
Fixes PR45086.
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75519
Added:
Modified:
llvm/lib/CodeGen/ExpandMemCmp.cpp
llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
llvm/test/CodeGen/X86/memcmp-optsize.ll
llvm/test/CodeGen/X86/memcmp-pgso.ll
llvm/test/CodeGen/X86/memcmp.ll
llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/ExpandMemCmp.cpp b/llvm/lib/CodeGen/ExpandMemCmp.cpp
index 589a6d3bc3c7..213416d08610 100644
--- a/llvm/lib/CodeGen/ExpandMemCmp.cpp
+++ b/llvm/lib/CodeGen/ExpandMemCmp.cpp
@@ -23,6 +23,7 @@
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/InitializePasses.h"
+#include "llvm/Transforms/Utils/Local.h"
#include "llvm/Transforms/Utils/SizeOpts.h"
using namespace llvm;
@@ -845,6 +846,9 @@ PreservedAnalyses ExpandMemCmpPass::runImpl(
++BBIt;
}
}
+ if (MadeChanges)
+ for (BasicBlock &BB : F)
+ SimplifyInstructionsInBlock(&BB);
return MadeChanges ? PreservedAnalyses::none() : PreservedAnalyses::all();
}
diff --git a/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll b/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
index 75cb0c652815..f6efcdd7d852 100644
--- a/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
+++ b/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
@@ -89,28 +89,8 @@ define signext i32 @zeroEqualityTest03(i8* %x, i8* %y) {
; Validate with > 0
define signext i32 @zeroEqualityTest04() {
; CHECK-LABEL: zeroEqualityTest04:
-; CHECK: # %bb.0:
-; CHECK-NEXT: b .LBB3_2
-; CHECK-NEXT: # %bb.1: # %loadbb1
+; CHECK: # %bb.0: # %loadbb
; CHECK-NEXT: li 3, 0
-; CHECK-NEXT: li 5, 0
-; CHECK-NEXT: li 4, 0
-; CHECK-NEXT: b .LBB3_4
-; CHECK-NEXT: .LBB3_2:
-; CHECK-NEXT: li 3, 1
-; CHECK-NEXT: li 4, 3
-; CHECK-NEXT: sldi 3, 3, 58
-; CHECK-NEXT: sldi 4, 4, 56
-; CHECK-NEXT: # %bb.3: # %res_block
-; CHECK-NEXT: cmpld 3, 4
-; CHECK-NEXT: li 3, 1
-; CHECK-NEXT: li 4, -1
-; CHECK-NEXT: isel 5, 4, 3, 0
-; CHECK-NEXT: .LBB3_4: # %endblock
-; CHECK-NEXT: extsw 3, 5
-; CHECK-NEXT: neg 3, 3
-; CHECK-NEXT: rldicl 3, 3, 1, 63
-; CHECK-NEXT: xori 3, 3, 1
; CHECK-NEXT: blr
%call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer2 to i8*), i64 16)
%not.cmp = icmp slt i32 %call, 1
@@ -121,22 +101,8 @@ define signext i32 @zeroEqualityTest04() {
; Validate with < 0
define signext i32 @zeroEqualityTest05() {
; CHECK-LABEL: zeroEqualityTest05:
-; CHECK: # %bb.0:
-; CHECK-NEXT: li 3, 0
-; CHECK-NEXT: li 4, 0
-; CHECK-NEXT: # %bb.1: # %loadbb1
+; CHECK: # %bb.0: # %loadbb
; CHECK-NEXT: li 3, 0
-; CHECK-NEXT: # %bb.2:
-; CHECK-NEXT: lis 3, 768
-; CHECK-NEXT: lis 4, 1024
-; CHECK-NEXT: # %bb.3: # %res_block
-; CHECK-NEXT: cmpld 3, 4
-; CHECK-NEXT: li 3, 1
-; CHECK-NEXT: li 4, -1
-; CHECK-NEXT: isel 3, 4, 3, 0
-; CHECK-NEXT: # %bb.4: # %endblock
-; CHECK-NEXT: nor 3, 3, 3
-; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31
; CHECK-NEXT: blr
%call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer2 to i8*), i64 16)
%call.lobit = lshr i32 %call, 31
diff --git a/llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll b/llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
index ea08e5316ba4..d46255c6459d 100644
--- a/llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
+++ b/llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
@@ -230,7 +230,7 @@ define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind {
define i32 @length3(i8* %X, i8* %Y) nounwind {
; X86-LABEL: length3:
-; X86: # %bb.0: # %loadbb
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -239,14 +239,14 @@ define i32 @length3(i8* %X, i8* %Y) nounwind {
; X86-NEXT: rolw $8, %dx
; X86-NEXT: rolw $8, %si
; X86-NEXT: cmpw %si, %dx
-; X86-NEXT: jne .LBB9_1
-; X86-NEXT: # %bb.2: # %loadbb1
+; X86-NEXT: jne .LBB9_3
+; X86-NEXT: # %bb.1: # %loadbb1
; X86-NEXT: movzbl 2(%eax), %eax
; X86-NEXT: movzbl 2(%ecx), %ecx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: popl %esi
; X86-NEXT: retl
-; X86-NEXT: .LBB9_1: # %res_block
+; X86-NEXT: .LBB9_3: # %res_block
; X86-NEXT: setae %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: leal -1(%eax,%eax), %eax
@@ -254,19 +254,19 @@ define i32 @length3(i8* %X, i8* %Y) nounwind {
; X86-NEXT: retl
;
; X64-LABEL: length3:
-; X64: # %bb.0: # %loadbb
+; X64: # %bb.0:
; X64-NEXT: movzwl (%rdi), %eax
; X64-NEXT: movzwl (%rsi), %ecx
; X64-NEXT: rolw $8, %ax
; X64-NEXT: rolw $8, %cx
; X64-NEXT: cmpw %cx, %ax
-; X64-NEXT: jne .LBB9_1
-; X64-NEXT: # %bb.2: # %loadbb1
+; X64-NEXT: jne .LBB9_3
+; X64-NEXT: # %bb.1: # %loadbb1
; X64-NEXT: movzbl 2(%rdi), %eax
; X64-NEXT: movzbl 2(%rsi), %ecx
; X64-NEXT: subl %ecx, %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB9_1: # %res_block
+; X64-NEXT: .LBB9_3: # %res_block
; X64-NEXT: setae %al
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: leal -1(%rax,%rax), %eax
@@ -445,7 +445,7 @@ define i1 @length4_eq_const(i8* %X) nounwind {
define i32 @length5(i8* %X, i8* %Y) nounwind {
; X86-LABEL: length5:
-; X86: # %bb.0: # %loadbb
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -454,14 +454,14 @@ define i32 @length5(i8* %X, i8* %Y) nounwind {
; X86-NEXT: bswapl %edx
; X86-NEXT: bswapl %esi
; X86-NEXT: cmpl %esi, %edx
-; X86-NEXT: jne .LBB16_1
-; X86-NEXT: # %bb.2: # %loadbb1
+; X86-NEXT: jne .LBB16_3
+; X86-NEXT: # %bb.1: # %loadbb1
; X86-NEXT: movzbl 4(%eax), %eax
; X86-NEXT: movzbl 4(%ecx), %ecx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: popl %esi
; X86-NEXT: retl
-; X86-NEXT: .LBB16_1: # %res_block
+; X86-NEXT: .LBB16_3: # %res_block
; X86-NEXT: setae %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: leal -1(%eax,%eax), %eax
@@ -469,19 +469,19 @@ define i32 @length5(i8* %X, i8* %Y) nounwind {
; X86-NEXT: retl
;
; X64-LABEL: length5:
-; X64: # %bb.0: # %loadbb
+; X64: # %bb.0:
; X64-NEXT: movl (%rdi), %eax
; X64-NEXT: movl (%rsi), %ecx
; X64-NEXT: bswapl %eax
; X64-NEXT: bswapl %ecx
; X64-NEXT: cmpl %ecx, %eax
-; X64-NEXT: jne .LBB16_1
-; X64-NEXT: # %bb.2: # %loadbb1
+; X64-NEXT: jne .LBB16_3
+; X64-NEXT: # %bb.1: # %loadbb1
; X64-NEXT: movzbl 4(%rdi), %eax
; X64-NEXT: movzbl 4(%rsi), %ecx
; X64-NEXT: subl %ecx, %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB16_1: # %res_block
+; X64-NEXT: .LBB16_3: # %res_block
; X64-NEXT: setae %al
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: leal -1(%rax,%rax), %eax
@@ -521,7 +521,7 @@ define i1 @length5_eq(i8* %X, i8* %Y) nounwind {
define i1 @length5_lt(i8* %X, i8* %Y) nounwind {
; X86-LABEL: length5_lt:
-; X86: # %bb.0: # %loadbb
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -530,38 +530,38 @@ define i1 @length5_lt(i8* %X, i8* %Y) nounwind {
; X86-NEXT: bswapl %edx
; X86-NEXT: bswapl %esi
; X86-NEXT: cmpl %esi, %edx
-; X86-NEXT: jne .LBB18_1
-; X86-NEXT: # %bb.2: # %loadbb1
+; X86-NEXT: jne .LBB18_3
+; X86-NEXT: # %bb.1: # %loadbb1
; X86-NEXT: movzbl 4(%eax), %eax
; X86-NEXT: movzbl 4(%ecx), %ecx
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: jmp .LBB18_3
-; X86-NEXT: .LBB18_1: # %res_block
+; X86-NEXT: jmp .LBB18_2
+; X86-NEXT: .LBB18_3: # %res_block
; X86-NEXT: setae %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: leal -1(%eax,%eax), %eax
-; X86-NEXT: .LBB18_3: # %endblock
+; X86-NEXT: .LBB18_2: # %endblock
; X86-NEXT: shrl $31, %eax
; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: popl %esi
; X86-NEXT: retl
;
; X64-LABEL: length5_lt:
-; X64: # %bb.0: # %loadbb
+; X64: # %bb.0:
; X64-NEXT: movl (%rdi), %eax
; X64-NEXT: movl (%rsi), %ecx
; X64-NEXT: bswapl %eax
; X64-NEXT: bswapl %ecx
; X64-NEXT: cmpl %ecx, %eax
-; X64-NEXT: jne .LBB18_1
-; X64-NEXT: # %bb.2: # %loadbb1
+; X64-NEXT: jne .LBB18_3
+; X64-NEXT: # %bb.1: # %loadbb1
; X64-NEXT: movzbl 4(%rdi), %eax
; X64-NEXT: movzbl 4(%rsi), %ecx
; X64-NEXT: subl %ecx, %eax
; X64-NEXT: shrl $31, %eax
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
-; X64-NEXT: .LBB18_1: # %res_block
+; X64-NEXT: .LBB18_3: # %res_block
; X64-NEXT: setae %al
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: leal -1(%rax,%rax), %eax
diff --git a/llvm/test/CodeGen/X86/memcmp-optsize.ll b/llvm/test/CodeGen/X86/memcmp-optsize.ll
index 63bbb8f0ed8d..594a4a68dac0 100644
--- a/llvm/test/CodeGen/X86/memcmp-optsize.ll
+++ b/llvm/test/CodeGen/X86/memcmp-optsize.ll
@@ -111,7 +111,7 @@ define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind optsize {
define i32 @length3(i8* %X, i8* %Y) nounwind optsize {
; X86-LABEL: length3:
-; X86: # %bb.0: # %loadbb
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -120,34 +120,34 @@ define i32 @length3(i8* %X, i8* %Y) nounwind optsize {
; X86-NEXT: rolw $8, %dx
; X86-NEXT: rolw $8, %si
; X86-NEXT: cmpw %si, %dx
-; X86-NEXT: jne .LBB4_1
-; X86-NEXT: # %bb.2: # %loadbb1
+; X86-NEXT: jne .LBB4_3
+; X86-NEXT: # %bb.1: # %loadbb1
; X86-NEXT: movzbl 2(%eax), %eax
; X86-NEXT: movzbl 2(%ecx), %ecx
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: jmp .LBB4_3
-; X86-NEXT: .LBB4_1: # %res_block
+; X86-NEXT: jmp .LBB4_2
+; X86-NEXT: .LBB4_3: # %res_block
; X86-NEXT: setae %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: leal -1(%eax,%eax), %eax
-; X86-NEXT: .LBB4_3: # %endblock
+; X86-NEXT: .LBB4_2: # %endblock
; X86-NEXT: popl %esi
; X86-NEXT: retl
;
; X64-LABEL: length3:
-; X64: # %bb.0: # %loadbb
+; X64: # %bb.0:
; X64-NEXT: movzwl (%rdi), %eax
; X64-NEXT: movzwl (%rsi), %ecx
; X64-NEXT: rolw $8, %ax
; X64-NEXT: rolw $8, %cx
; X64-NEXT: cmpw %cx, %ax
-; X64-NEXT: jne .LBB4_1
-; X64-NEXT: # %bb.2: # %loadbb1
+; X64-NEXT: jne .LBB4_3
+; X64-NEXT: # %bb.1: # %loadbb1
; X64-NEXT: movzbl 2(%rdi), %eax
; X64-NEXT: movzbl 2(%rsi), %ecx
; X64-NEXT: subl %ecx, %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB4_1: # %res_block
+; X64-NEXT: .LBB4_3: # %res_block
; X64-NEXT: setae %al
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: leal -1(%rax,%rax), %eax
@@ -256,7 +256,7 @@ define i1 @length4_eq_const(i8* %X) nounwind optsize {
define i32 @length5(i8* %X, i8* %Y) nounwind optsize {
; X86-LABEL: length5:
-; X86: # %bb.0: # %loadbb
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -265,34 +265,34 @@ define i32 @length5(i8* %X, i8* %Y) nounwind optsize {
; X86-NEXT: bswapl %edx
; X86-NEXT: bswapl %esi
; X86-NEXT: cmpl %esi, %edx
-; X86-NEXT: jne .LBB9_1
-; X86-NEXT: # %bb.2: # %loadbb1
+; X86-NEXT: jne .LBB9_3
+; X86-NEXT: # %bb.1: # %loadbb1
; X86-NEXT: movzbl 4(%eax), %eax
; X86-NEXT: movzbl 4(%ecx), %ecx
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: jmp .LBB9_3
-; X86-NEXT: .LBB9_1: # %res_block
+; X86-NEXT: jmp .LBB9_2
+; X86-NEXT: .LBB9_3: # %res_block
; X86-NEXT: setae %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: leal -1(%eax,%eax), %eax
-; X86-NEXT: .LBB9_3: # %endblock
+; X86-NEXT: .LBB9_2: # %endblock
; X86-NEXT: popl %esi
; X86-NEXT: retl
;
; X64-LABEL: length5:
-; X64: # %bb.0: # %loadbb
+; X64: # %bb.0:
; X64-NEXT: movl (%rdi), %eax
; X64-NEXT: movl (%rsi), %ecx
; X64-NEXT: bswapl %eax
; X64-NEXT: bswapl %ecx
; X64-NEXT: cmpl %ecx, %eax
-; X64-NEXT: jne .LBB9_1
-; X64-NEXT: # %bb.2: # %loadbb1
+; X64-NEXT: jne .LBB9_3
+; X64-NEXT: # %bb.1: # %loadbb1
; X64-NEXT: movzbl 4(%rdi), %eax
; X64-NEXT: movzbl 4(%rsi), %ecx
; X64-NEXT: subl %ecx, %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB9_1: # %res_block
+; X64-NEXT: .LBB9_3: # %res_block
; X64-NEXT: setae %al
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: leal -1(%rax,%rax), %eax
diff --git a/llvm/test/CodeGen/X86/memcmp-pgso.ll b/llvm/test/CodeGen/X86/memcmp-pgso.ll
index c3c3a1db8171..75e9f5975d95 100644
--- a/llvm/test/CodeGen/X86/memcmp-pgso.ll
+++ b/llvm/test/CodeGen/X86/memcmp-pgso.ll
@@ -111,7 +111,7 @@ define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind !prof !14 {
define i32 @length3(i8* %X, i8* %Y) nounwind !prof !14 {
; X86-LABEL: length3:
-; X86: # %bb.0: # %loadbb
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -120,34 +120,34 @@ define i32 @length3(i8* %X, i8* %Y) nounwind !prof !14 {
; X86-NEXT: rolw $8, %dx
; X86-NEXT: rolw $8, %si
; X86-NEXT: cmpw %si, %dx
-; X86-NEXT: jne .LBB4_1
-; X86-NEXT: # %bb.2: # %loadbb1
+; X86-NEXT: jne .LBB4_3
+; X86-NEXT: # %bb.1: # %loadbb1
; X86-NEXT: movzbl 2(%eax), %eax
; X86-NEXT: movzbl 2(%ecx), %ecx
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: jmp .LBB4_3
-; X86-NEXT: .LBB4_1: # %res_block
+; X86-NEXT: jmp .LBB4_2
+; X86-NEXT: .LBB4_3: # %res_block
; X86-NEXT: setae %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: leal -1(%eax,%eax), %eax
-; X86-NEXT: .LBB4_3: # %endblock
+; X86-NEXT: .LBB4_2: # %endblock
; X86-NEXT: popl %esi
; X86-NEXT: retl
;
; X64-LABEL: length3:
-; X64: # %bb.0: # %loadbb
+; X64: # %bb.0:
; X64-NEXT: movzwl (%rdi), %eax
; X64-NEXT: movzwl (%rsi), %ecx
; X64-NEXT: rolw $8, %ax
; X64-NEXT: rolw $8, %cx
; X64-NEXT: cmpw %cx, %ax
-; X64-NEXT: jne .LBB4_1
-; X64-NEXT: # %bb.2: # %loadbb1
+; X64-NEXT: jne .LBB4_3
+; X64-NEXT: # %bb.1: # %loadbb1
; X64-NEXT: movzbl 2(%rdi), %eax
; X64-NEXT: movzbl 2(%rsi), %ecx
; X64-NEXT: subl %ecx, %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB4_1: # %res_block
+; X64-NEXT: .LBB4_3: # %res_block
; X64-NEXT: setae %al
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: leal -1(%rax,%rax), %eax
@@ -256,7 +256,7 @@ define i1 @length4_eq_const(i8* %X) nounwind !prof !14 {
define i32 @length5(i8* %X, i8* %Y) nounwind !prof !14 {
; X86-LABEL: length5:
-; X86: # %bb.0: # %loadbb
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -265,34 +265,34 @@ define i32 @length5(i8* %X, i8* %Y) nounwind !prof !14 {
; X86-NEXT: bswapl %edx
; X86-NEXT: bswapl %esi
; X86-NEXT: cmpl %esi, %edx
-; X86-NEXT: jne .LBB9_1
-; X86-NEXT: # %bb.2: # %loadbb1
+; X86-NEXT: jne .LBB9_3
+; X86-NEXT: # %bb.1: # %loadbb1
; X86-NEXT: movzbl 4(%eax), %eax
; X86-NEXT: movzbl 4(%ecx), %ecx
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: jmp .LBB9_3
-; X86-NEXT: .LBB9_1: # %res_block
+; X86-NEXT: jmp .LBB9_2
+; X86-NEXT: .LBB9_3: # %res_block
; X86-NEXT: setae %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: leal -1(%eax,%eax), %eax
-; X86-NEXT: .LBB9_3: # %endblock
+; X86-NEXT: .LBB9_2: # %endblock
; X86-NEXT: popl %esi
; X86-NEXT: retl
;
; X64-LABEL: length5:
-; X64: # %bb.0: # %loadbb
+; X64: # %bb.0:
; X64-NEXT: movl (%rdi), %eax
; X64-NEXT: movl (%rsi), %ecx
; X64-NEXT: bswapl %eax
; X64-NEXT: bswapl %ecx
; X64-NEXT: cmpl %ecx, %eax
-; X64-NEXT: jne .LBB9_1
-; X64-NEXT: # %bb.2: # %loadbb1
+; X64-NEXT: jne .LBB9_3
+; X64-NEXT: # %bb.1: # %loadbb1
; X64-NEXT: movzbl 4(%rdi), %eax
; X64-NEXT: movzbl 4(%rsi), %ecx
; X64-NEXT: subl %ecx, %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB9_1: # %res_block
+; X64-NEXT: .LBB9_3: # %res_block
; X64-NEXT: setae %al
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: leal -1(%rax,%rax), %eax
diff --git a/llvm/test/CodeGen/X86/memcmp.ll b/llvm/test/CodeGen/X86/memcmp.ll
index e1cbdfaa16bb..986e7ae20548 100644
--- a/llvm/test/CodeGen/X86/memcmp.ll
+++ b/llvm/test/CodeGen/X86/memcmp.ll
@@ -276,7 +276,7 @@ define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind {
define i32 @length3(i8* %X, i8* %Y) nounwind {
; X86-LABEL: length3:
-; X86: # %bb.0: # %loadbb
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -285,14 +285,14 @@ define i32 @length3(i8* %X, i8* %Y) nounwind {
; X86-NEXT: rolw $8, %dx
; X86-NEXT: rolw $8, %si
; X86-NEXT: cmpw %si, %dx
-; X86-NEXT: jne .LBB11_1
-; X86-NEXT: # %bb.2: # %loadbb1
+; X86-NEXT: jne .LBB11_3
+; X86-NEXT: # %bb.1: # %loadbb1
; X86-NEXT: movzbl 2(%eax), %eax
; X86-NEXT: movzbl 2(%ecx), %ecx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: popl %esi
; X86-NEXT: retl
-; X86-NEXT: .LBB11_1: # %res_block
+; X86-NEXT: .LBB11_3: # %res_block
; X86-NEXT: setae %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: leal -1(%eax,%eax), %eax
@@ -300,19 +300,19 @@ define i32 @length3(i8* %X, i8* %Y) nounwind {
; X86-NEXT: retl
;
; X64-LABEL: length3:
-; X64: # %bb.0: # %loadbb
+; X64: # %bb.0:
; X64-NEXT: movzwl (%rdi), %eax
; X64-NEXT: movzwl (%rsi), %ecx
; X64-NEXT: rolw $8, %ax
; X64-NEXT: rolw $8, %cx
; X64-NEXT: cmpw %cx, %ax
-; X64-NEXT: jne .LBB11_1
-; X64-NEXT: # %bb.2: # %loadbb1
+; X64-NEXT: jne .LBB11_3
+; X64-NEXT: # %bb.1: # %loadbb1
; X64-NEXT: movzbl 2(%rdi), %eax
; X64-NEXT: movzbl 2(%rsi), %ecx
; X64-NEXT: subl %ecx, %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB11_1: # %res_block
+; X64-NEXT: .LBB11_3: # %res_block
; X64-NEXT: setae %al
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: leal -1(%rax,%rax), %eax
@@ -491,7 +491,7 @@ define i1 @length4_eq_const(i8* %X) nounwind {
define i32 @length5(i8* %X, i8* %Y) nounwind {
; X86-LABEL: length5:
-; X86: # %bb.0: # %loadbb
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -500,14 +500,14 @@ define i32 @length5(i8* %X, i8* %Y) nounwind {
; X86-NEXT: bswapl %edx
; X86-NEXT: bswapl %esi
; X86-NEXT: cmpl %esi, %edx
-; X86-NEXT: jne .LBB18_1
-; X86-NEXT: # %bb.2: # %loadbb1
+; X86-NEXT: jne .LBB18_3
+; X86-NEXT: # %bb.1: # %loadbb1
; X86-NEXT: movzbl 4(%eax), %eax
; X86-NEXT: movzbl 4(%ecx), %ecx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: popl %esi
; X86-NEXT: retl
-; X86-NEXT: .LBB18_1: # %res_block
+; X86-NEXT: .LBB18_3: # %res_block
; X86-NEXT: setae %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: leal -1(%eax,%eax), %eax
@@ -515,19 +515,19 @@ define i32 @length5(i8* %X, i8* %Y) nounwind {
; X86-NEXT: retl
;
; X64-LABEL: length5:
-; X64: # %bb.0: # %loadbb
+; X64: # %bb.0:
; X64-NEXT: movl (%rdi), %eax
; X64-NEXT: movl (%rsi), %ecx
; X64-NEXT: bswapl %eax
; X64-NEXT: bswapl %ecx
; X64-NEXT: cmpl %ecx, %eax
-; X64-NEXT: jne .LBB18_1
-; X64-NEXT: # %bb.2: # %loadbb1
+; X64-NEXT: jne .LBB18_3
+; X64-NEXT: # %bb.1: # %loadbb1
; X64-NEXT: movzbl 4(%rdi), %eax
; X64-NEXT: movzbl 4(%rsi), %ecx
; X64-NEXT: subl %ecx, %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB18_1: # %res_block
+; X64-NEXT: .LBB18_3: # %res_block
; X64-NEXT: setae %al
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: leal -1(%rax,%rax), %eax
@@ -567,7 +567,7 @@ define i1 @length5_eq(i8* %X, i8* %Y) nounwind {
define i1 @length5_lt(i8* %X, i8* %Y) nounwind {
; X86-LABEL: length5_lt:
-; X86: # %bb.0: # %loadbb
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -576,38 +576,38 @@ define i1 @length5_lt(i8* %X, i8* %Y) nounwind {
; X86-NEXT: bswapl %edx
; X86-NEXT: bswapl %esi
; X86-NEXT: cmpl %esi, %edx
-; X86-NEXT: jne .LBB20_1
-; X86-NEXT: # %bb.2: # %loadbb1
+; X86-NEXT: jne .LBB20_3
+; X86-NEXT: # %bb.1: # %loadbb1
; X86-NEXT: movzbl 4(%eax), %eax
; X86-NEXT: movzbl 4(%ecx), %ecx
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: jmp .LBB20_3
-; X86-NEXT: .LBB20_1: # %res_block
+; X86-NEXT: jmp .LBB20_2
+; X86-NEXT: .LBB20_3: # %res_block
; X86-NEXT: setae %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: leal -1(%eax,%eax), %eax
-; X86-NEXT: .LBB20_3: # %endblock
+; X86-NEXT: .LBB20_2: # %endblock
; X86-NEXT: shrl $31, %eax
; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: popl %esi
; X86-NEXT: retl
;
; X64-LABEL: length5_lt:
-; X64: # %bb.0: # %loadbb
+; X64: # %bb.0:
; X64-NEXT: movl (%rdi), %eax
; X64-NEXT: movl (%rsi), %ecx
; X64-NEXT: bswapl %eax
; X64-NEXT: bswapl %ecx
; X64-NEXT: cmpl %ecx, %eax
-; X64-NEXT: jne .LBB20_1
-; X64-NEXT: # %bb.2: # %loadbb1
+; X64-NEXT: jne .LBB20_3
+; X64-NEXT: # %bb.1: # %loadbb1
; X64-NEXT: movzbl 4(%rdi), %eax
; X64-NEXT: movzbl 4(%rsi), %ecx
; X64-NEXT: subl %ecx, %eax
; X64-NEXT: shrl $31, %eax
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
-; X64-NEXT: .LBB20_1: # %res_block
+; X64-NEXT: .LBB20_3: # %res_block
; X64-NEXT: setae %al
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: leal -1(%rax,%rax), %eax
diff --git a/llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll b/llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll
index 3bcc6115b766..a95dc518573b 100644
--- a/llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll
+++ b/llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll
@@ -26,9 +26,7 @@ define i32 @cmp3(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; ALL-LABEL: @cmp3(
; ALL-NEXT: br label [[LOADBB:%.*]]
; ALL: res_block:
-; ALL-NEXT: [[PHI_SRC1:%.*]] = phi i16 [ [[TMP7:%.*]], [[LOADBB]] ]
-; ALL-NEXT: [[PHI_SRC2:%.*]] = phi i16 [ [[TMP8:%.*]], [[LOADBB]] ]
-; ALL-NEXT: [[TMP1:%.*]] = icmp ult i16 [[PHI_SRC1]], [[PHI_SRC2]]
+; ALL-NEXT: [[TMP1:%.*]] = icmp ult i16 [[TMP7:%.*]], [[TMP8:%.*]]
; ALL-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; ALL-NEXT: br label [[ENDBLOCK:%.*]]
; ALL: loadbb:
@@ -80,9 +78,7 @@ define i32 @cmp5(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; ALL-LABEL: @cmp5(
; ALL-NEXT: br label [[LOADBB:%.*]]
; ALL: res_block:
-; ALL-NEXT: [[PHI_SRC1:%.*]] = phi i32 [ [[TMP7:%.*]], [[LOADBB]] ]
-; ALL-NEXT: [[PHI_SRC2:%.*]] = phi i32 [ [[TMP8:%.*]], [[LOADBB]] ]
-; ALL-NEXT: [[TMP1:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]]
+; ALL-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP7:%.*]], [[TMP8:%.*]]
; ALL-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; ALL-NEXT: br label [[ENDBLOCK:%.*]]
; ALL: loadbb:
@@ -218,9 +214,7 @@ define i32 @cmp9(i8* nocapture readonly %x, i8* nocapture readonly %y) {
; X64-LABEL: @cmp9(
; X64-NEXT: br label [[LOADBB:%.*]]
; X64: res_block:
-; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ]
-; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ]
-; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
+; X64-NEXT: [[TMP1:%.*]] = icmp ult i64 [[TMP7:%.*]], [[TMP8:%.*]]
; X64-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1
; X64-NEXT: br label [[ENDBLOCK:%.*]]
; X64: loadbb:
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