[PATCH] D58475: [X86] Improve detection of unneeded shift amount masking to also handle the case that the LHS has known zeroes in it
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 6 09:54:15 PST 2020
RKSimon added inline comments.
================
Comment at: llvm/trunk/lib/Target/X86/X86InstrCompiler.td:1803
// (shift x (and y, 63)) ==> (shift x, y)
- def : Pat<(frag GR64:$src1, GR64:$src2, (and CL, immShift64)),
+ def : Pat<(frag GR64:$src1, GR64:$src2, (shiftMask32 CL)),
(!cast<Instruction>(name # "64rrCL") GR64:$src1, GR64:$src2)>;
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craig.topper wrote:
> RKSimon wrote:
> > @craig.topper This looks like a typo - shouldn't it be ShiftMask64 for the GR64 case?
> Yeah that does look like a typo. Must have copy/pasted too much.
Cheers, D75748 replaces all this code but I just wanted to make sure I hadn't made a dumb assumption about SHLD/SHRD.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D58475/new/
https://reviews.llvm.org/D58475
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