[PATCH] D75702: [PowerPC32] Fix the setcc unexpected expansion problem
Xiangling Liao via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 5 10:58:13 PST 2020
Xiangling_L created this revision.
Xiangling_L added reviewers: sfertile, cebowleratibm, hubert.reinterpretcast.
Xiangling_L added a project: LLVM.
Herald added subscribers: llvm-commits, shchenz, jsji, kbarton, hiraditya, nemanjai.
On 32-bit PPC target[AIX and BE], when we convert an `i64` to `f32`, a `setcc` operand expansion is needed. The expansion will set the result type of expanded `setcc` operation based on if the subtarget use CRBits or not. If the subtarget does use the CRBits, like AIX and BE, then it will set the result type to `i1`, leading to an inconsistency with original `setcc` result type[i32].
This patch fix this problem by setting original setcc opnode result type also based on if the subtarget uses the CRBits or not.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D75702
Files:
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/test/CodeGen/PowerPC/ppc32-setcc-expansion.ll
Index: llvm/test/CodeGen/PowerPC/ppc32-setcc-expansion.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/ppc32-setcc-expansion.ll
@@ -0,0 +1,20 @@
+; RUN: llc -verify-machineinstrs < %s -mcpu=pwr4 \
+; RUN: -mtriple=powerpc-ibm-aix-xcoff 2>&1 | FileCheck %s
+
+; RUN: llc -verify-machineinstrs < %s -mcpu=pwr4 \
+; RUN: -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s
+
+%struct.A = type { float }
+
+ at ll = external local_unnamed_addr global i64
+ at a = external local_unnamed_addr global %struct.A
+
+define void @foo() local_unnamed_addr {
+entry:
+ %0 = load i64, i64* @ll
+ %conv = sitofp i64 %0 to float
+ store float %conv, float* getelementptr inbounds (%struct.A, %struct.A* @a, i32 0, i32 0)
+ ret void
+}
+
+; CHECK-NOT: Unexpected setcc expansion!
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -8116,8 +8116,8 @@
SINT, DAG.getConstant(53, dl, MVT::i32));
Cond = DAG.getNode(ISD::ADD, dl, MVT::i64,
Cond, DAG.getConstant(1, dl, MVT::i64));
- Cond = DAG.getSetCC(dl, MVT::i32,
- Cond, DAG.getConstant(1, dl, MVT::i64), ISD::SETUGT);
+ Cond = DAG.getSetCC(dl, Subtarget.useCRBits() ? MVT::i1 : MVT::i32, Cond,
+ DAG.getConstant(1, dl, MVT::i64), ISD::SETUGT);
SINT = DAG.getNode(ISD::SELECT, dl, MVT::i64, Cond, Round, SINT);
}
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