[PATCH] D75686: AMDGPU: Fix SMRD test in trivially disjoint mem access code

[David Stuttard via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGa74b33f61251: AMDGPU: Fix SMRD test in trivially disjoint mem access code (authored by dstuttard).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75686/new/

https://reviews.llvm.org/D75686

Files:
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll


Index: llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
+++ llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
@@ -88,10 +88,10 @@
 ; GCN-LABEL: {{^}}reorder_constant_load_global_store_constant_load:
 ; GCN-DAG: v_readfirstlane_b32 s[[PTR_LO:[0-9]+]], v{{[0-9]+}}
 ; GCN: v_readfirstlane_b32 s[[PTR_HI:[0-9]+]], v{{[0-9]+}}
-; CI: buffer_store_dword
 
-; CI-DAG: s_load_dword s{{[0-9]+}}, s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, 0x1
-; CI-DAG: s_load_dword s{{[0-9]+}}, s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, 0x3
+; CI: s_load_dword s{{[0-9]+}}, s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, 0x1
+; CI: buffer_store_dword
+; CI: s_load_dword s{{[0-9]+}}, s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, 0x3
 
 ; GFX9: s_load_dword s{{[0-9]+}}, s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, 0x4
 ; GFX9: global_store_dword
Index: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -2666,7 +2666,7 @@
     if (isSMRD(MIb))
       return checkInstOffsetsDoNotOverlap(MIa, MIb);
 
-    return !isFLAT(MIb) && !isMUBUF(MIa) && !isMTBUF(MIa);
+    return !isFLAT(MIb) && !isMUBUF(MIb) && !isMTBUF(MIb);
   }
 
   if (isFLAT(MIa)) {


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