[PATCH] D75547: [AMDGPU][GlobalISel] Revise handling of wide loads in RegBankSelect

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:1179
+  // RegBankSelect.
+  RepairInst->eraseFromParent();
 
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How does this ensure the correct result register is used? I thought this trying to infer what intermediate operations were introduced was fragile. Can we just not report the breakdown and directly handle the split, so we never have the unneeded instruction?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75547/new/

https://reviews.llvm.org/D75547