[PATCH] D75437: [AVR] Fix incorrect register state for LDRdPtr
Jim Lin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 2 22:25:43 PST 2020
Jim updated this revision to Diff 247787.
Jim added a comment.
Add -verify-machineinstrs for brind.ll
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D75437/new/
https://reviews.llvm.org/D75437
Files:
llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
llvm/test/CodeGen/AVR/PR37143.ll
llvm/test/CodeGen/AVR/brind.ll
llvm/test/CodeGen/AVR/load.ll
llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir
Index: llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir
===================================================================
--- llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir
+++ llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir
@@ -17,7 +17,7 @@
; CHECK-LABEL: test_ldwrdptr
- ; CHECK: $r0, $r31r30 = LDRdPtr
+ ; CHECK: $r0 = LDRdPtr $r31r30
; CHECK-NEXT: $r1 = LDDRdPtrQ $r31r30, 1
$r1r0 = LDWRdPtr $r31r30
Index: llvm/test/CodeGen/AVR/load.ll
===================================================================
--- llvm/test/CodeGen/AVR/load.ll
+++ llvm/test/CodeGen/AVR/load.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mattr=avr6,sram < %s -march=avr | FileCheck %s
+; RUN: llc -mattr=avr6,sram < %s -march=avr -verify-machineinstrs | FileCheck %s
define i8 @load8(i8* %x) {
; CHECK-LABEL: load8:
Index: llvm/test/CodeGen/AVR/brind.ll
===================================================================
--- llvm/test/CodeGen/AVR/brind.ll
+++ llvm/test/CodeGen/AVR/brind.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mattr=sram,eijmpcall < %s -march=avr | FileCheck %s
+; RUN: llc -mattr=sram,eijmpcall < %s -march=avr -verify-machineinstrs | FileCheck %s
@brind.k = private unnamed_addr constant [2 x i8*] [i8* blockaddress(@brind, %return), i8* blockaddress(@brind, %b)], align 1
Index: llvm/test/CodeGen/AVR/PR37143.ll
===================================================================
--- llvm/test/CodeGen/AVR/PR37143.ll
+++ llvm/test/CodeGen/AVR/PR37143.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mattr=avr6,sram < %s -march=avr | FileCheck %s
+; RUN: llc -mattr=avr6,sram < %s -march=avr -verify-machineinstrs | FileCheck %s
; CHECK: ld {{r[0-9]+}}, [[PTR:[XYZ]]]
; CHECK: ldd {{r[0-9]+}}, [[PTR]]+1
Index: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
===================================================================
--- llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
+++ llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
@@ -598,7 +598,7 @@
// Load low byte.
auto MIBLO = buildMI(MBB, MBBI, OpLo)
.addReg(CurDstLoReg, RegState::Define)
- .addReg(SrcReg, RegState::Define);
+ .addReg(SrcReg);
// Push low byte onto stack if necessary.
if (TmpReg)
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