[PATCH] D75428: [MC][ARM] add implicit immediate form for ldrsbt/ldrht/ldrsht

[Jian Cai via Phabricator via llvm-commits]

jcai19 added a comment.

In D75428#1901958 <https://reviews.llvm.org/D75428#1901958>, @efriedma wrote:

> I spent a couple minutes experimenting; the following "works":
>
>   def : InstAlias<"ldrsbt${q} $Rt, $Rn2, $Rn", (LDRSBTi GPR:$Rt, GPR:$Rn2, addr_offset_none:$Rn, 256, pred:$q)>, Requires<[IsARM]>;
>
>
> The immediate doesn't pose a problem, as far as I can tell.
>
> The problem, of course, is that this syntax isn't right.  And there isn't any way to make it right.  For instructions, we do some magic with "Constraints" to infer the second output register, but that currently doesn't work for aliases.
>
> So I guess this approach is fine.  (Of course, there's still the `#0` vs `#-0` issue.)


Thank you for the clarification! How about adding a new class in the multiclass AI3ldrT for implicit immediate I proposed above? Out of curiosity, do we prefer adding pseudo instructions to instruction classes in general for this kind of situations? Thanks.


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https://reviews.llvm.org/D75428