[PATCH] D75203: Relax existing instructions to reduce the number of nops needed for alignment purposes

[Kan Shengchen via Phabricator via llvm-commits]

skan added inline comments.


================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:673
+  RemainingSize -= Delta;
+  return true;
+}
----------------
reames wrote:
> Note to self: Since this is increasing the size of the instruction, we need to make sure we're not creating a branch boundary crossing case.  If we are, we can just skip the optional expansion here.  
I think we add the code
```
if needAlignInst(Inst) return false;
auto *PF = cast_or_null<MCBoundaryAlignFragment>(RF.getPrevNode());
if(PF && PF.canEmitNops()) return false;
```
in the function `canBeRelaxedForPadding` to make sure we're not creating a branch boundary crossing case


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75203/new/

https://reviews.llvm.org/D75203