[PATCH] D75400: [LICM] Allow freeze to hoist out of a loop
Juneyoung Lee via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 28 22:25:37 PST 2020
aqjune created this revision.
Herald added subscribers: llvm-commits, asbirlea, hiraditya.
Herald added a project: LLVM.
This patch allows LICM to hoist freeze instructions out of a loop.
Sinking freeze into a loop is not allowed because after sinking the instruction may yield different values for iterations.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D75400
Files:
llvm/lib/Transforms/Scalar/LICM.cpp
llvm/test/Transforms/LICM/freeze.ll
Index: llvm/test/Transforms/LICM/freeze.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/LICM/freeze.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -licm -S < %s | FileCheck %s
+
+define void @licm(i1 %a) {
+; CHECK-LABEL: @licm(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[B:%.*]] = freeze i1 [[A:%.*]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: call void @use(i1 [[B]])
+; CHECK-NEXT: br label [[LOOP]]
+;
+entry:
+ br label %loop
+loop:
+ %b = freeze i1 %a
+ call void @use(i1 %b)
+ br label %loop
+}
+
+declare void @use(i1)
Index: llvm/lib/Transforms/Scalar/LICM.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/LICM.cpp
+++ llvm/lib/Transforms/Scalar/LICM.cpp
@@ -993,7 +993,7 @@
isa<SelectInst>(I) || isa<GetElementPtrInst>(I) || isa<CmpInst>(I) ||
isa<InsertElementInst>(I) || isa<ExtractElementInst>(I) ||
isa<ShuffleVectorInst>(I) || isa<ExtractValueInst>(I) ||
- isa<InsertValueInst>(I));
+ isa<InsertValueInst>(I) || isa<FreezeInst>(I));
}
/// Return true if all of the alias sets within this AST are known not to
/// contain a Mod, or if MSSA knows thare are no MemoryDefs in the loop.
@@ -1231,6 +1231,10 @@
return MSSA->isLiveOnEntryDef(Source) ||
!CurLoop->contains(Source->getBlock());
}
+ } else if (isa<FreezeInst>(&I)) {
+ // Freeze instruction cannot be sunk into a loop because it may yield a
+ // different value for each iteration after sinking.
+ return !Flags->IsSink;
}
assert(!I.mayReadOrWriteMemory() && "unhandled aliasing");
@@ -1945,7 +1949,7 @@
// Note that proving a load safe to speculate requires proving
// sufficient alignment at the target location. Proving it guaranteed
// to execute does as well. Thus we can increase our guaranteed
- // alignment as well.
+ // alignment as well.
if (!DereferenceableInPH || (InstAlignment > Alignment))
if (isSafeToExecuteUnconditionally(*Load, DT, CurLoop, SafetyInfo,
ORE, Preheader->getTerminator())) {
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