[PATCH] D45073: [AMDGPU] Fixed some instructions latencies

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/trunk/lib/Target/AMDGPU/VOP3Instructions.td:383
 def V_ASHR_I64 : VOP3Inst <"v_ashr_i64", VOP3_Profile<VOP_I64_I64_I32>>;
 def V_MULLIT_F32 : VOP3Inst <"v_mullit_f32", VOP3_Profile<VOP_F32_F32_F32_F32>>;
 } // End SubtargetPredicate = isSICI
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rampitec wrote:
> foad wrote:
> > Hi @rampitec, was it intentional to set Write64Bit for V_MULLIT_F32?
> No, this is mistake, it is buried inside B64 block. This is full rate opcode.
Fixed by 7d973307d5515b44df92f041916a0be25c1faa4b.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D45073/new/

https://reviews.llvm.org/D45073