[llvm] 0368b42 - [entry values] ARM: Add a describeLoadedValue override (PR45025)
Vedant Kumar via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 28 14:35:22 PST 2020
Author: Vedant Kumar
Date: 2020-02-28T14:30:40-08:00
New Revision: 0368b42295325dc3b3e7deaa72a2db9e2b049df2
URL: https://github.com/llvm/llvm-project/commit/0368b42295325dc3b3e7deaa72a2db9e2b049df2
DIFF: https://github.com/llvm/llvm-project/commit/0368b42295325dc3b3e7deaa72a2db9e2b049df2.diff
LOG: [entry values] ARM: Add a describeLoadedValue override (PR45025)
As a narrow stopgap for the assertion failure described in PR45025, add
a describeLoadedValue override to ARMBaseInstrInfo and use it to detect
copies in which the forwarding reg is a super/sub reg of the copy
destination. For the moment this is unsupported.
Several follow ups are possible:
1) Handle VORRq. At the moment, we do not, because isCopyInstrImpl
returns early when !MI.isMoveReg().
2) In the case where forwarding reg is a super-reg of the copy
destination, we should be able to describe the forwarding reg as a
subreg within the copy destination. I'm not 100% sure about this, but
it looks like that's what's done in AArch64InstrInfo.
3) In the case where the forwarding reg is a sub-reg of the copy
destination, maybe we could describe the forwarding reg using the
copy destinaion and a DW_OP_LLVM_fragment (I guess this should be
possible after D75036).
https://bugs.llvm.org/show_bug.cgi?id=45025
rdar://59772698
Differential Revision: https://reviews.llvm.org/D75273
Added:
llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir
Modified:
llvm/lib/CodeGen/TargetInstrInfo.cpp
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/lib/Target/ARM/ARMBaseInstrInfo.h
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/TargetInstrInfo.cpp b/llvm/lib/CodeGen/TargetInstrInfo.cpp
index dbf11683e98c..cc390cfbec19 100644
--- a/llvm/lib/CodeGen/TargetInstrInfo.cpp
+++ b/llvm/lib/CodeGen/TargetInstrInfo.cpp
@@ -1150,6 +1150,11 @@ TargetInstrInfo::describeLoadedValue(const MachineInstr &MI,
if (auto DestSrc = isCopyInstr(MI)) {
Register DestReg = DestSrc->Destination->getReg();
+ // If the copy destination is the forwarding reg, describe the forwarding
+ // reg using the copy source as the backup location. Example:
+ //
+ // x0 = MOV x7
+ // call callee(x0) ; x0 described as x7
if (Reg == DestReg)
return ParamLoadedValue(*DestSrc->Source, Expr);
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 382a1a7e6a67..2660c83e8abc 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1027,6 +1027,36 @@ ARMBaseInstrInfo::isCopyInstrImpl(const MachineInstr &MI) const {
return DestSourcePair{MI.getOperand(0), MI.getOperand(1)};
}
+Optional<ParamLoadedValue>
+ARMBaseInstrInfo::describeLoadedValue(const MachineInstr &MI,
+ Register Reg) const {
+ if (auto DstSrcPair = isCopyInstrImpl(MI)) {
+ Register DstReg = DstSrcPair->Destination->getReg();
+
+ // TODO: We don't handle cases where the forwarding reg is narrower/wider
+ // than the copy registers. Consider for example:
+ //
+ // s16 = VMOVS s0
+ // s17 = VMOVS s1
+ // call @callee(d0)
+ //
+ // We'd like to describe the call site value of d0 as d8, but this requires
+ // gathering and merging the descriptions for the two VMOVS instructions.
+ //
+ // We also don't handle the reverse situation, where the forwarding reg is
+ // narrower than the copy destination:
+ //
+ // d8 = VMOVD d0
+ // call @callee(s1)
+ //
+ // We need to produce a fragment description (the call site value of s1 is
+ // /not/ just d8).
+ if (DstReg != Reg)
+ return None;
+ }
+ return TargetInstrInfo::describeLoadedValue(MI, Reg);
+}
+
const MachineInstrBuilder &
ARMBaseInstrInfo::AddDReg(MachineInstrBuilder &MIB, unsigned Reg,
unsigned SubIdx, unsigned State,
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
index 08c767d38c08..8a3dea8152f1 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -105,6 +105,11 @@ class ARMBaseInstrInfo : public ARMGenInstrInfo {
Optional<DestSourcePair>
isCopyInstrImpl(const MachineInstr &MI) const override;
+ /// Specialization of \ref TargetInstrInfo::describeLoadedValue, used to
+ /// enhance debug entry value descriptions for ARM targets.
+ Optional<ParamLoadedValue> describeLoadedValue(const MachineInstr &MI,
+ Register Reg) const override;
+
public:
// Return whether the target has an explicit NOP encoding.
bool hasNOP() const;
diff --git a/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir b/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
new file mode 100644
index 000000000000..01550612b0d7
--- /dev/null
+++ b/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
@@ -0,0 +1,102 @@
+# RUN: llc -O1 -debug-entry-values -filetype=obj -mtriple thumbv7em-apple-unknown-macho -start-after=machineverifier %s -o %t.o
+# RUN: llvm-dwarfdump %t.o | FileCheck %s
+
+# Crash test, reduced from:
+#
+# a(float);
+# b(double c) {
+# d();
+# a(c);
+# }
+#
+# Some minor surgery was performed on the MIR to remove a call to a truncating
+# cast builtin between the calls to "d" and "a", and to force d0 as the copy dst
+# and s0 as the forwarding reg.
+#
+# This was done to test the case where the copy dst (d0) is a super-reg of the
+# forwarding reg (s0).
+
+# CHECK: DW_TAG_GNU_call_site
+# CHECK-NEXT: DW_AT_abstract_origin {{.*}} "a"
+# CHECK-NOT: call_site_parameter
+
+--- |
+ target datalayout = "e-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
+ target triple = "thumbv7em-apple-unknown-macho"
+ ; Function Attrs: nounwind optsize uwtable
+ define arm_aapcs_vfpcc i32 @b(double %c) local_unnamed_addr #0 !dbg !16 {
+ entry:
+ call void @llvm.dbg.value(metadata double %c, metadata !21, metadata !DIExpression()), !dbg !22
+ %call = tail call arm_aapcs_vfpcc i32 bitcast (i32 (...)* @d to i32 ()*)(), !dbg !23
+ %conv = fptrunc double %c to float, !dbg !24
+ %call1 = tail call arm_aapcs_vfpcc i32 @a(float %conv), !dbg !25
+ ret i32 undef, !dbg !26
+ }
+ declare arm_aapcs_vfpcc i32 @d(...) local_unnamed_addr #0
+ declare !dbg !4 arm_aapcs_vfpcc i32 @a(float) local_unnamed_addr #0
+ declare void @llvm.dbg.value(metadata, metadata, metadata)
+ declare void @llvm.stackprotector(i8*, i8**)
+
+ attributes #0 = { "disable-tail-calls"="false" "frame-pointer"="all" }
+
+ !llvm.dbg.cu = !{!0}
+ !llvm.module.flags = !{!10, !11, !12, !13, !14}
+ !llvm.ident = !{!15}
+
+ !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 10.0.0 (git at github.com:apple/llvm-project.git 6203ec90d0bb0fd705fc0ad00ee263e5579aa709)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None)
+ !1 = !DIFile(filename: "jnyn_freeBSD.c", directory: "/Users/vsk/tmp/jnyn")
+ !2 = !{}
+ !3 = !{!4}
+ !4 = !DISubprogram(name: "a", scope: !5, file: !5, line: 1, type: !6, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !2)
+ !5 = !DIFile(filename: "unreduced2.c", directory: "/Users/vsk/tmp/jnyn")
+ !6 = !DISubroutineType(types: !7)
+ !7 = !{!8, !9}
+ !8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+ !9 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
+ !10 = !{i32 7, !"Dwarf Version", i32 4}
+ !11 = !{i32 2, !"Debug Info Version", i32 3}
+ !12 = !{i32 1, !"wchar_size", i32 4}
+ !13 = !{i32 1, !"min_enum_size", i32 4}
+ !14 = !{i32 7, !"PIC Level", i32 2}
+ !15 = !{!"clang version 10.0.0 (git at github.com:apple/llvm-project.git 6203ec90d0bb0fd705fc0ad00ee263e5579aa709)"}
+ !16 = distinct !DISubprogram(name: "b", scope: !5, file: !5, line: 2, type: !17, scopeLine: 2, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !20)
+ !17 = !DISubroutineType(types: !18)
+ !18 = !{!8, !19}
+ !19 = !DIBasicType(name: "double", size: 64, encoding: DW_ATE_float)
+ !20 = !{!21}
+ !21 = !DILocalVariable(name: "c", arg: 1, scope: !16, file: !5, line: 2, type: !19)
+ !22 = !DILocation(line: 0, scope: !16)
+ !23 = !DILocation(line: 3, column: 3, scope: !16)
+ !24 = !DILocation(line: 4, column: 5, scope: !16)
+ !25 = !DILocation(line: 4, column: 3, scope: !16)
+ !26 = !DILocation(line: 5, column: 1, scope: !16)
+
+...
+---
+name: b
+callSites:
+ - { bb: 0, offset: 12, fwdArgRegs: [] }
+ - { bb: 0, offset: 15, fwdArgRegs:
+ - { arg: 0, reg: '$s0' } }
+body: |
+ bb.0.entry:
+ liveins: $d0, $lr, $d8
+
+ DBG_VALUE $d0, $noreg, !21, !DIExpression(), debug-location !22
+ frame-setup tPUSH 14, $noreg, $r7, killed $lr, implicit-def $sp, implicit $sp
+ frame-setup CFI_INSTRUCTION def_cfa_offset 8
+ frame-setup CFI_INSTRUCTION offset $lr, -4
+ frame-setup CFI_INSTRUCTION offset $r7, -8
+ $r7 = frame-setup tMOVr $sp, 14, $noreg
+ frame-setup CFI_INSTRUCTION def_cfa_register $r7
+ $sp = frame-setup VSTMDDB_UPD $sp, 14, $noreg, killed $d8
+ frame-setup CFI_INSTRUCTION offset $d8, -16
+ $s16 = VMOVS killed $s0, 14, $noreg
+ $s17 = VMOVS killed $s1, 14, $noreg, implicit-def $d8
+ DBG_VALUE $d8, $noreg, !21, !DIExpression(), debug-location !22
+ tBL 14, $noreg, @d, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def dead $r0, debug-location !23
+ $d0 = VMOVD killed $d8, 14, $noreg, debug-location !24
+ DBG_VALUE $d0, $noreg, !21, !DIExpression(), debug-location !22
+ tTAILJMPd @a, 14, $noreg, implicit $sp, implicit $sp, implicit killed $s0, debug-location !25
+
+...
diff --git a/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir b/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir
new file mode 100644
index 000000000000..c36c6c72af02
--- /dev/null
+++ b/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir
@@ -0,0 +1,95 @@
+# RUN: llc -O1 -debug-entry-values -filetype=obj -mtriple thumbv7em-apple-unknown-macho -start-after=machineverifier %s -o %t.o
+# RUN: llvm-dwarfdump %t.o | FileCheck %s
+
+# Crash test, reduced from:
+#
+# a(double);
+# b(double c) {
+# d();
+# a(c);
+# }
+
+# CHECK: DW_TAG_GNU_call_site
+# CHECK-NEXT: DW_AT_abstract_origin {{.*}} "a"
+# CHECK-NOT: call_site_parameter
+
+--- |
+ ; ModuleID = 'unreduced.c'
+ source_filename = "unreduced.c"
+ target datalayout = "e-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
+ target triple = "thumbv7em-apple-unknown-macho"
+ ; Function Attrs: nounwind optsize uwtable
+ define arm_aapcs_vfpcc i32 @b(double %c) local_unnamed_addr #0 !dbg !16 {
+ entry:
+ call void @llvm.dbg.value(metadata double %c, metadata !18, metadata !DIExpression()), !dbg !19
+ %call = tail call arm_aapcs_vfpcc i32 bitcast (i32 (...)* @d to i32 ()*)(), !dbg !20
+ %call1 = tail call arm_aapcs_vfpcc i32 @a(double %c), !dbg !21
+ ret i32 undef, !dbg !22
+ }
+ declare arm_aapcs_vfpcc i32 @d(...) local_unnamed_addr #0
+ declare !dbg !4 arm_aapcs_vfpcc i32 @a(double) local_unnamed_addr #0
+ declare void @llvm.dbg.value(metadata, metadata, metadata)
+ declare void @llvm.stackprotector(i8*, i8**)
+
+ attributes #0 = { "disable-tail-calls"="false" "frame-pointer"="all" }
+
+ !llvm.dbg.cu = !{!0}
+ !llvm.module.flags = !{!10, !11, !12, !13, !14}
+ !llvm.ident = !{!15}
+
+ !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 10.0.0 (git at github.com:apple/llvm-project.git 6203ec90d0bb0fd705fc0ad00ee263e5579aa709)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None)
+ !1 = !DIFile(filename: "jnyn_freeBSD.c", directory: "/Users/vsk/tmp/jnyn")
+ !2 = !{}
+ !3 = !{!4}
+ !4 = !DISubprogram(name: "a", scope: !5, file: !5, line: 1, type: !6, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !2)
+ !5 = !DIFile(filename: "unreduced.c", directory: "/Users/vsk/tmp/jnyn")
+ !6 = !DISubroutineType(types: !7)
+ !7 = !{!8, !9}
+ !8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+ !9 = !DIBasicType(name: "double", size: 64, encoding: DW_ATE_float)
+ !10 = !{i32 7, !"Dwarf Version", i32 4}
+ !11 = !{i32 2, !"Debug Info Version", i32 3}
+ !12 = !{i32 1, !"wchar_size", i32 4}
+ !13 = !{i32 1, !"min_enum_size", i32 4}
+ !14 = !{i32 7, !"PIC Level", i32 2}
+ !15 = !{!"clang version 10.0.0 (git at github.com:apple/llvm-project.git 6203ec90d0bb0fd705fc0ad00ee263e5579aa709)"}
+ !16 = distinct !DISubprogram(name: "b", scope: !5, file: !5, line: 2, type: !6, scopeLine: 2, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !17)
+ !17 = !{!18}
+ !18 = !DILocalVariable(name: "c", arg: 1, scope: !16, file: !5, line: 2, type: !9)
+ !19 = !DILocation(line: 0, scope: !16)
+ !20 = !DILocation(line: 3, column: 3, scope: !16)
+ !21 = !DILocation(line: 4, column: 3, scope: !16)
+ !22 = !DILocation(line: 5, column: 1, scope: !16)
+
+...
+---
+name: b
+callSites:
+ - { bb: 0, offset: 12, fwdArgRegs: [] }
+ - { bb: 0, offset: 18, fwdArgRegs:
+ - { arg: 0, reg: '$d0' } }
+body: |
+ bb.0.entry:
+ liveins: $d0, $lr, $d8
+
+ DBG_VALUE $d0, $noreg, !18, !DIExpression(), debug-location !19
+ frame-setup tPUSH 14, $noreg, $r7, killed $lr, implicit-def $sp, implicit $sp
+ frame-setup CFI_INSTRUCTION def_cfa_offset 8
+ frame-setup CFI_INSTRUCTION offset $lr, -4
+ frame-setup CFI_INSTRUCTION offset $r7, -8
+ $r7 = frame-setup tMOVr $sp, 14, $noreg
+ frame-setup CFI_INSTRUCTION def_cfa_register $r7
+ $sp = frame-setup VSTMDDB_UPD $sp, 14, $noreg, killed $d8
+ frame-setup CFI_INSTRUCTION offset $d8, -16
+ $s16 = VMOVS killed $s0, 14, $noreg
+ $s17 = VMOVS killed $s1, 14, $noreg, implicit-def $d8
+ DBG_VALUE $d8, $noreg, !18, !DIExpression(), debug-location !19
+ tBL 14, $noreg, @d, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def dead $r0, debug-location !20
+ $s0 = VMOVS killed $s16, 14, $noreg, debug-location !21
+ $s1 = VMOVS killed $s17, 14, $noreg, implicit-def $d0, debug-location !21
+ DBG_VALUE $d0, $noreg, !18, !DIExpression(), debug-location !19
+ $sp = VLDMDIA_UPD $sp, 14, $noreg, def $d8, debug-location !21
+ $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr, debug-location !21
+ tTAILJMPd @a, 14, $noreg, implicit $sp, implicit $sp, implicit killed $d0, debug-location !21
+
+...
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