[PATCH] D74873: [AMDGPU] Define 16 bit VGPR subregs

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec marked 5 inline comments as done.
rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:47
+
+  assert(getSubRegIndexLaneMask(AMDGPU::sub0).getAsInteger() == 3 &&
+         getSubRegIndexLaneMask(AMDGPU::sub31).getAsInteger() == (3ULL << 62) &&
----------------
arsenm wrote:
> Can this be a state_assert? I would hope getSubRegIndexLaneMask is constexpr
Unfortunately it is not a constexpr. I wanted to make a static assert right at getNumCoveredRegs(), but that did not fly.


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  https://reviews.llvm.org/D74873/new/

https://reviews.llvm.org/D74873