[PATCH] D75344: [PowerPC] Exploit VSX neg, abs and nabs instruction for f32

[Qiu Chaofan via Phabricator via llvm-commits]

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Comment at: llvm/test/CodeGen/PowerPC/fma.ll:130
+; CHECK-VSX: fmsubs
+; CHECK-VSX: xsnegdp
 ; CHECK-VSX-NEXT: blr
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I know here looks like a regression. But I'm drafting another patch to disable `nmsub` instruction when no `nsz` flag set. So the pattern will be removed from td file and we can get `xsnmsubadp` naturally.


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https://reviews.llvm.org/D75344