[PATCH] D75266: SROA: Don't drop atomic load/store alignments (PR45010)

Hans Wennborg via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 28 02:08:52 PST 2020


hans marked an inline comment as done.
hans added inline comments.


================
Comment at: llvm/test/Transforms/SROA/alignment.ll:242
+  %2 = bitcast %struct* %B to i32*
+  %x = load atomic volatile i32, i32* %2 acquire, align 4
+  ret i32 %x
----------------
jfb wrote:
> From the code, it looks like you want a test where the load is volatile only as well?
> Should probably test stores too?
> 
> Does this affect other memory operations, i.e. the atomic ones?
I don't think the volatile-only case is interesting. My code doesn't change anything for that case.

I've made the test cover stores too.

I'm not sure what you mean by "other memory operations, i.e. the atomic ones". This change affects exactly the atomic memory operations..


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75266/new/

https://reviews.llvm.org/D75266





More information about the llvm-commits mailing list