[PATCH] D75238: [DAGCombine] Fix alias analysis for unaligned accesses

Thu Feb 27 11:35:25 PST 2020

nickdesaulniers marked an inline comment as done.
nickdesaulniers added inline comments.

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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:21134
+      SrcValOffset0 % *MUC0.NumBytes == 0 &&
+      SrcValOffset1 % *MUC0.NumBytes == 0) {
     int64_t OffAlign0 = SrcValOffset0 % OrigAlignment0;
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Probably should hoist `MUC0.NumBytes` and `MUC1.NumBytes` above the if into their own locals, like the offsets and alignments; would help make this condition and block more readable.

Also, was mod'ing `SrcValueOffset1` by `*MUC0.NumBytes` intentional? Should it be `*MUC1.NumBytes`?

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Comment at: llvm/test/CodeGen/ARM/memset-align.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=thumbv8-unknown-linux-android10000 -o - | FileCheck %s
+
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What is going on with this target triple? LOL

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75238/new/

https://reviews.llvm.org/D75238