[PATCH] D75266: SROA: Don't drop atomic load/store alignments (PR45010)
JF Bastien via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 27 09:28:09 PST 2020
jfb added inline comments.
================
Comment at: llvm/test/Transforms/SROA/alignment.ll:242
+ %2 = bitcast %struct* %B to i32*
+ %x = load atomic volatile i32, i32* %2 acquire, align 4
+ ret i32 %x
----------------
>From the code, it looks like you want a test where the load is volatile only as well?
Should probably test stores too?
Does this affect other memory operations, i.e. the atomic ones?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D75266/new/
https://reviews.llvm.org/D75266
More information about the llvm-commits
mailing list