[llvm] 72f044e - [NFC][ARM] Add test case
Sam Parker via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 27 01:39:30 PST 2020
Author: Sam Parker
Date: 2020-02-27T09:38:34Z
New Revision: 72f044ecdfb566ccffca5e078494d1761a1c2af9
URL: https://github.com/llvm/llvm-project/commit/72f044ecdfb566ccffca5e078494d1761a1c2af9
DIFF: https://github.com/llvm/llvm-project/commit/72f044ecdfb566ccffca5e078494d1761a1c2af9.diff
LOG: [NFC][ARM] Add test case
Added:
llvm/test/CodeGen/Thumb2/LowOverheadLoops/cmplx_cong.mir
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/cmplx_cong.mir b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/cmplx_cong.mir
new file mode 100644
index 000000000000..c27af5789fd5
--- /dev/null
+++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/cmplx_cong.mir
@@ -0,0 +1,104 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s
+
+--- |
+
+ @arm_cmplx_conj_f32_mve.cmplx_conj_sign = internal constant [4 x float] [float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00], align 4
+
+ ; Function Attrs: nounwind
+ define hidden void @arm_cmplx_conj_f32_mve(float* %pSrc, float* %pDst, i32 %blockSize) local_unnamed_addr #0 {
+ entry:
+ ret void
+ }
+
+...
+---
+name: arm_cmplx_conj_f32_mve
+alignment: 4
+tracksRegLiveness: true
+registers: []
+liveins:
+ - { reg: '$r0', virtual-reg: '' }
+ - { reg: '$r1', virtual-reg: '' }
+ - { reg: '$r2', virtual-reg: '' }
+frameInfo:
+ stackSize: 8
+ offsetAdjustment: 0
+ maxAlignment: 4
+fixedStack: []
+stack:
+ - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
+ stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+machineFunctionInfo: {}
+body: |
+ ; CHECK-LABEL: name: arm_cmplx_conj_f32_mve
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x80000000)
+ ; CHECK: liveins: $lr, $r0, $r1, $r3, $r4
+ ; CHECK: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
+ ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
+ ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
+ ; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -8
+ ; CHECK: tCMPi8 renamable $r3, 4, 14 /* CC::al */, $noreg, implicit-def dead $cpsr
+ ; FIXME: tLSRi needs to be producing the value in r3
+ ; CHECK: $r4 = t2MOVi16 target-flags(arm-lo16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg
+ ; CHECK: $r4 = t2MOVTi16 killed $r4, target-flags(arm-hi16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg
+ ; CHECK: renamable $q0 = nnan ninf nsz MVE_VLDRWU32 killed renamable $r4, 0, 0, $noreg
+ ; CHECK: $lr = MVE_DLSTP_32 killed renamable $r3
+ ; CHECK: bb.1 (align 4):
+ ; CHECK: successors: %bb.1(0x7c000000), %bb.2(0x04000000)
+ ; CHECK: liveins: $lr, $q0, $r0, $r1
+ ; CHECK: renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 0, $noreg
+ ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMULf32 killed renamable $q1, renamable $q0, 0, $noreg, undef renamable $q1
+ ; CHECK: MVE_VSTRWU32 killed renamable $q1, renamable $r1, 0, 0, killed $noreg
+ ; CHECK: renamable $r1, dead $cpsr = nuw tADDi8 killed renamable $r1, 16, 14 /* CC::al */, $noreg
+ ; CHECK: renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg
+ ; CHECK: $lr = MVE_LETP killed renamable $lr, %bb.1
+ ; CHECK: bb.2:
+ ; CHECK: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc
+ bb.0:
+ successors: %bb.1(0x80000000)
+ liveins: $r0, $r1, $r2, $r4, $lr
+
+ frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
+ frame-setup CFI_INSTRUCTION def_cfa_offset 8
+ frame-setup CFI_INSTRUCTION offset $lr, -4
+ frame-setup CFI_INSTRUCTION offset $r4, -8
+ renamable $r12 = t2MOVi 4, 14 /* CC::al */, $noreg, $noreg
+ renamable $r3, dead $cpsr = tLSLri renamable $r2, 1, 14 /* CC::al */, $noreg
+ tCMPi8 renamable $r3, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr
+ t2IT 11, 8, implicit-def $itstate
+ $r12 = t2LSLri renamable $r2, 1, 11 /* CC::lt */, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate
+ renamable $r2 = t2RSBrs killed renamable $r12, killed renamable $r2, 10, 14 /* CC::al */, $noreg, $noreg
+ $r4 = t2MOVi16 target-flags(arm-lo16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg
+ renamable $r2, dead $cpsr = tADDi8 killed renamable $r2, 3, 14 /* CC::al */, $noreg
+ renamable $lr = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
+ $r4 = t2MOVTi16 killed $r4, target-flags(arm-hi16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg
+ renamable $q0 = nnan ninf nsz MVE_VLDRWU32 killed renamable $r4, 0, 0, $noreg
+ renamable $lr = nuw nsw t2ADDrs killed renamable $lr, killed renamable $r2, 19, 14 /* CC::al */, $noreg, $noreg
+ t2DoLoopStart renamable $lr
+
+ bb.1 (align 4):
+ successors: %bb.1(0x7c000000), %bb.2(0x04000000)
+ liveins: $lr, $q0, $r0, $r1, $r3
+
+ renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg
+ MVE_VPST 2, implicit $vpr
+ renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr
+ renamable $q1 = nnan ninf nsz MVE_VMULf32 killed renamable $q1, renamable $q0, 1, renamable $vpr, undef renamable $q1
+ MVE_VSTRWU32 killed renamable $q1, renamable $r1, 0, 1, killed renamable $vpr
+ renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg
+ renamable $r1, dead $cpsr = nuw tADDi8 killed renamable $r1, 16, 14 /* CC::al */, $noreg
+ renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg
+ renamable $lr = t2LoopDec killed renamable $lr, 1
+ t2LoopEnd renamable $lr, %bb.1, implicit-def dead $cpsr
+ tB %bb.2, 14 /* CC::al */, $noreg
+
+ bb.2:
+ tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc
+
+...
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