[PATCH] D71701: [AArch64] Peephole optimization. Merge AND and TST instructions
Pavel Kosov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 26 23:31:48 PST 2020
kpdev42 marked 2 inline comments as done.
kpdev42 added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2574
+ if (!isOpcWithIntImmediate(ShiftAmt.getNode(), ISD::AND, MaskImm)
+ && !isOpcWithIntImmediate(ShiftAmt.getNode(), AArch64ISD::ANDS, MaskImm))
return false;
----------------
craig.topper wrote:
> nit. the && should be on the line above
Thank you ) Fixed
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71701/new/
https://reviews.llvm.org/D71701
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