[PATCH] D71701: [AArch64] Peephole optimization. Merge AND and TST instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2574
+    if (!isOpcWithIntImmediate(ShiftAmt.getNode(), ISD::AND, MaskImm)
+        && !isOpcWithIntImmediate(ShiftAmt.getNode(), AArch64ISD::ANDS, MaskImm))
       return false;
----------------
nit. the && should be on the line above


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71701/new/

https://reviews.llvm.org/D71701