[PATCH] D71701: [AArch64] Peephole optimization. Merge AND and TST instructions
Sjoerd Meijer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 26 01:33:17 PST 2020
SjoerdMeijer added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/peephole-and-tst.ll:32
+; Usage #2
+; CHECK: and [[DSTREG2:w[0-9]+]]
+; CHECK-NEXT: cmp [[DSTREG1]], [[DSTREG2]]
----------------
Selection DAG isel has basic block scope, so I don't think this will be recognised as another use, and thus this would not be affected by a replaceAllUsesWith call when the transformation kicks in. So, best to move the 2nd use to the same block.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71701/new/
https://reviews.llvm.org/D71701
More information about the llvm-commits
mailing list