[PATCH] D71701: [AArch64] Peephole optimization. Merge AND and TST instructions

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 25 01:56:26 PST 2020


dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1687
+      // Replace all users of (and X, Y) with newly generated (ands X, Y)
+      DAG.ReplaceAllUsesWith(LHS.getNode(), &ANDSNode);
+      return ANDSNode.getValue(1);
----------------
Can this just be DAG.ReplaceAllUsesWith(LHS, ANDSNode) ?

Otherwise it looks like it might try to treat &ANDSNode as an array.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71701/new/

https://reviews.llvm.org/D71701





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