[PATCH] D75098: Add COPY_BR, a terminator form of the COPY instr

[Bill Wendling via Phabricator via llvm-commits]

void created this revision.
void added reviewers: jyknight, nickdesaulniers, hfinkel, MaskRay, lattner.
Herald added subscribers: llvm-commits, hiraditya, MatzeB.
Herald added a project: LLVM.

The INLINEASM_BR instruction's a terminator, and the code generator
doesn't allow non-terminator instructions after a terminator. This is an
issue when an INLINEASM_BR defines a physical register. We can't place
the copies of the physical registers into virtual registers in the
fallthrough block because physical registers can't be marked as
"live-in" until after register allocation.

To get around this issue, we introduce a new pseudo-instruction,
COPY_BR, that's identical to the COPY instruction, but is a terminator.
With it we're able to copy the physical registers to virtual registers
without needing to place the copies in a fallthrough block:

  bb.1:
    INLINEASM_BR &"" ..., implicit-def $esi, $1:[regdef],...
    %9:gr32 = COPY_BR $esi
  
  bb.2:
  ; predecessors: %bb.1
    successors: %bb.3(0x80000000); %bb.3(100.00%)
  
    %0:gr32 = COPY %9:gr32
    JMP_1 %bb.3

The COPY_BR is converted to a normal COPY after register allocation,
when we have live variable information and live-ins are allowed on basic
blocks.

The fast register allocator behaves a bit differently because everything
is spilled before the end of a basic block. Therefore, we allow a store
of a physical register after the INLINEASM_BR when optimizations are
disabled.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75098

Files:
  llvm/include/llvm/CodeGen/MachineBasicBlock.h
  llvm/include/llvm/CodeGen/MachineInstr.h
  llvm/include/llvm/Support/TargetOpcodes.def
  llvm/include/llvm/Target/Target.td
  llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
  llvm/lib/CodeGen/MachineSink.cpp
  llvm/lib/CodeGen/MachineVerifier.cpp
  llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
  llvm/test/CodeGen/AArch64/callbr-asm-label.ll
  llvm/test/CodeGen/SystemZ/asm-20.ll
  llvm/test/CodeGen/X86/callbr-asm-label-addr.ll

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